NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC

Key Takeaways

• NextSilicon will ship 64‑core and 128‑core Arbel CPUs in early 2028
• Arbel runs at 3.4 GHz on TSMC’s advanced node, targeting HPC and AI
• Design emphasizes single‑thread performance for agentic AI workloads
• RISC‑V data‑center market projected to exceed $200 B by 2034

Pulse Analysis

The launch of NextSilicon’s Arbel processor marks a pivotal step for RISC‑V’s migration from niche accelerators to mainstream server silicon. By scaling a proven test‑chip architecture to 64 and 128 cores, Arbel delivers a 3.4 GHz frequency, a 10‑wide instruction issue pipeline and four 128‑bit vector units—all on TSMC’s advanced process. These specifications place it squarely against incumbent x86 and ARM server offerings, while its open ISA eliminates traditional licensing fees, giving enterprises greater control over their hardware roadmap.

Agentic AI—software that autonomously orchestrates tools, code and services—places unique demands on CPUs. Unlike massive GPU‑driven training, these workloads require rapid serial execution to manage reasoning loops and data movement. Arbel’s design prioritizes single‑thread throughput, leveraging a TAGE branch predictor and a sizable reorder buffer to minimize latency. Coupled with full Linux and RVA23 compliance, the core can serve both as a standalone processor and as the orchestration engine for NextSilicon’s Maverick‑2 accelerator, creating a tightly integrated heterogeneous platform for AI inference and HPC tasks.

The broader RISC‑V ecosystem is reaching a tipping point. With major Linux distributions, compiler toolchains and cloud vendors now offering native support, the data‑center segment is projected to grow at a 33.1% CAGR, surpassing $200 billion by 2034. Arbel’s entry addresses the remaining performance gap at the top of the stack, offering a compelling, cost‑effective alternative for organizations seeking to avoid vendor lock‑in. As early adopters evaluate the chip, NextSilicon’s roadmap could accelerate RISC‑V’s acceptance as a first‑class server architecture, reshaping the competitive dynamics of the AI and HPC markets.