European Consortium Launches €50 Million SPINS Pilot Line to Industrialize Semiconductor Quantum Chips

European Consortium Launches €50 Million SPINS Pilot Line to Industrialize Semiconductor Quantum Chips

Quantum Computing Report
Quantum Computing ReportApr 18, 2026

Companies Mentioned

Pasqal

Pasqal

Infineon

Infineon

IFX

STMicroelectronics Inc.

STMicroelectronics Inc.

Quobly

Quobly

Why It Matters

SPINS gives Europe a dedicated, fab‑scale route to commercial quantum hardware, strengthening technological sovereignty and competitiveness against US and Chinese quantum programmes.

Key Takeaways

  • SPINS receives €50 M (~$55 M) EU funding for quantum chip pilot line
  • Consortium of 25 partners will offer 300 mm MPW runs for spin‑qubit designs
  • Fraunhofer IPMS leads high‑resolution lithography for Si/SiGe qubits
  • VTT develops cryogenic CMOS control to power qubits at 1–4 K
  • SPINS aims for industrial‑grade quantum chips by 2031, boosting EU sovereignty

Pulse Analysis

The European Union’s Chips Act has earmarked billions of euros to close the gap between laboratory breakthroughs and volume manufacturing of quantum hardware. Within that framework, the newly announced SPINS (Semiconductor Pilot line for Industrial Quantum NanoSystems) pilot line brings a €50 million (about $55 million) investment from the EU’s Chips Joint Undertaking and member states. Led by imec and backed by 25 research institutes and industry players—including Infineon, STMicroelectronics and Fraunhofer IPMS—the project creates a dedicated 300 mm CMOS pathway for spin‑qubit processors. By standardising design kits and offering multi‑project wafer runs, SPINS seeks to turn academic spin‑qubit concepts into repeatable, fab‑ready components.

Spin qubits built on silicon, silicon‑germanium and silicon‑on‑insulator platforms promise long coherence times while leveraging the massive economies of scale of existing semiconductor fabs. Fraunhofer IPMS will handle sub‑10‑nm patterning, CEA‑Leti will deliver foundry‑compatible process design kits, and imec will explore heterostructure Ge/GeSi integration on 300 mm wafers. A parallel effort led by VTT and SemiQon focuses on ultra‑low‑power cryogenic CMOS control circuitry capable of operating at 1–4 K, a prerequisite for scaling beyond a few dozen qubits. Together, these capabilities form a “lab‑to‑fab” ecosystem that can rapidly iterate designs and provide immediate feedback through a high‑throughput characterization network.

The SPINS line lowers entry barriers for European startups and SMEs, allowing them to prototype quantum processors without building costly clean‑room infrastructure. By delivering industrial‑grade quantum chips by 2031, the consortium aims to secure a sovereign supply chain and compete with US and Chinese initiatives that are already fielding superconducting and trapped‑ion pilot lines. The predictable, wafer‑scale production model also attracts venture capital, as investors gain confidence in a clear path from prototype to volume. In the longer term, SPINS could accelerate the rollout of fault‑tolerant quantum computers, reinforcing Europe’s position in the emerging quantum economy.

European Consortium Launches €50 Million SPINS Pilot Line to Industrialize Semiconductor Quantum Chips

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