Photon Bridge Demos >30mW Laser Output per Color at Wafer Scale on Silicon Photonics

Why It Matters

The breakthrough delivers high‑power, multi‑wavelength output on a scalable silicon platform, reducing fiber count and energy use in AI‑driven data‑center optics. It paves the way for cost‑effective, high‑density co‑packaged optical engines.

Key Takeaways

• >30 mW per channel demonstrated at wafer scale
• Platform integrates lasers and filters on silicon PIC
• Reduces fiber count for 1.6 T and 3.2 T co‑packaged optics
• 92% of III‑V‑silicon interconnects meet performance specs
• Assembly time cut up to 80× with OSAT‑compatible process

Pulse Analysis

Silicon photonics has long promised dense, low‑power optical interconnects, but achieving sufficient per‑channel laser power at scale remained a hurdle. Photon Bridge’s heterogeneous integration merges III‑V gain media with a 200 mm silicon foundry process, delivering more than 30 mW per wavelength directly from the wafer. This level of output, attained at room temperature in continuous‑wave mode, satisfies the power budget of emerging 1.6 Tb/s and 3.2 Tb/s co‑packaged optical engines, allowing multiple channels to share a single fiber without resorting to bulky external lasers.

The architecture’s ability to multiplex several wavelengths on one fiber directly addresses the fiber‑count explosion in AI‑focused data centers. Fewer fibers translate into lower cabling complexity, reduced rack space, and improved overall energy efficiency. Moreover, the platform’s simplified silicon process and OSAT‑compatible assembly cut integration time by up to 80 ×, while maintaining a 92 % yield on III‑V‑silicon interfaces. These manufacturing advantages lower the total cost of ownership for high‑density optical transceivers, making them attractive for hyperscale operators seeking to scale bandwidth without proportional power or capital increases.

Looking ahead, Photon Bridge’s roadmap includes scaling to quantum‑dot lasers that could operate without isolators, further streamlining system design. The company’s wafer‑scale validation, coupled with its presence at OFC 2026, signals readiness for large‑volume deployment and customer qualification. As the industry pushes toward terabit‑per‑second interconnects for AI workloads, such scalable, high‑power silicon photonic solutions are poised to become a cornerstone of next‑generation data‑center infrastructure.