RISC-V Optimized Strnlen Implementation For Linux 7.1 Yields Big Speed-Up

Key Takeaways

• 427% speed boost for strnlen() on RISC‑V
• Zbb‑enabled version adds vector‑like acceleration
• strchr() and strrchr() gain 7‑8% performance
• Patch queued for Linux 7.1 “for‑next” branch

Pulse Analysis

RISC‑V’s rapid ascent in the processor market has placed Linux kernel support at the forefront of its ecosystem. Core string‑handling routines such as strnlen(), strchr() and strrchr() are invoked millions of times per second, making even modest improvements critical for overall system performance. The recent discontinuation of eXecute‑In‑Place (XIP) support for Linux 7.1 left a performance gap that developers have been eager to fill, prompting targeted assembly optimizations.

Feng Jiang of KylinOS delivered a hand‑crafted assembly implementation that offers two execution paths: a generic version for all RISC‑V cores and a Zbb‑enabled variant that leverages the Bit‑Manipulation extension for vector‑like operations. Benchmarks show a staggering 427.5% speedup for strnlen(), while strchr() and strrchr() see 7‑8% gains. These improvements translate into lower CPU cycles per kernel call, reducing latency in file‑system operations, networking stacks, and security checks that rely on safe string length calculations.

The broader impact extends beyond raw numbers. Faster kernel string handling reduces power draw on embedded devices, an essential factor for IoT deployments where RISC‑V is gaining traction. For data‑center servers, the cumulative savings across thousands of cores can improve throughput and lower operating costs. By queuing the patch for the Linux 7.1 “for‑next” branch, the community signals a commitment to refining RISC‑V performance, setting the stage for further low‑level optimizations that could narrow the gap with established x86 and ARM platforms.