Memory‑centric computing tackles the dominant energy and latency bottleneck of data movement, enabling scalable AI and genomics workloads while dramatically reducing operational costs.
Prof. Onur Mutlu opened the IEEE Custom Integrated Circuits talk by framing memory‑centric computing as a response to exploding data volumes in AI, genomics, and other data‑intensive workloads. He highlighted that while CPUs, GPUs, and accelerators have grown more powerful, the cost of moving data between storage, memory, and compute now eclipses actual processing, with studies showing 60‑90% of system energy consumed by data movement.
The lecture surveyed concrete examples, from nanopore genome sequencers that generate terabytes of raw reads to large language models that demand ever‑larger memory footprints. Mutlu described prototype systems that attach reconfigurable logic to high‑bandwidth memory (HBM) – such as IBM‑partnered NFPJ boards – achieving >10× performance and >100× energy‑efficiency improvements for genome analysis and weather modeling. He also noted emerging techniques like in‑SSD filtering and near‑memory analytics that further shrink data transfer overhead.
Mutlu emphasized a paradigm shift: moving from processor‑centric designs, where caches and interconnect dominate silicon area, to data‑centric architectures that embed compute within memory stacks. He argued that future controllers should become data‑aware agents, leveraging metadata (security, compressibility, locality) and even reinforcement‑learning policies to make smarter scheduling decisions, thereby reducing unnecessary traffic.
The implications are clear: to sustain the growth of AI and scientific workloads, industry must redesign chips to process data where it resides. Memory‑centric solutions promise dramatic gains in performance, energy, and cost, while intelligent, data‑driven system components could unlock further efficiencies across servers, edge devices, and mobile platforms.
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