Testing Ryzen DDR5 Refresh Modes with Dual Rank Hynix 24Gb M-Die
•February 13, 2026
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Why It Matters
Understanding DDR5 refresh‑mode impacts helps Ryzen users fine‑tune memory for either latency‑critical tasks or bandwidth‑heavy applications, directly influencing gaming and content‑creation performance.
Key Takeaways
- •Dual‑rank 24 Gb DDR5 suffers ~10% loss in normal mode
- •Mixed mode on X870 Hero defaults to auto, matching mixed results
- •FGR improves latency but hurts synthetic bandwidth scores
- •Lowering TRFC values restores normal‑mode performance
- •Infinity‑Fabric bottleneck caps gains despite timing tweaks
Summary
The video examines how the new DDR5 refresh‑mode options on AMD’s AM5 platform affect performance with a dual‑rank 24 Gb Hynix M‑die kit (Corsair 2 × 48 GB 6000 CL30). Using an ASUS Crosshair X870 Hero with BIOS 20004 (AGSA 1.3.0.0.0), Buildzoid compares the standard "normal" mode, the automatically selected "mixed" mode, and the Frequency‑Granular Refresh (FGR) setting across a suite of benchmarks such as Time Spy, Y‑Cruncher, Pi Prime, Geekbench 3, and 3D Mark 11.
The key finding is that normal mode’s JDK‑specified TRFC1 of 1,228 clock cycles forces roughly ten percent of cycles to idle for refresh, dramatically hurting bandwidth‑heavy tests like Time Spy and Geekbench. Mixed mode, which the BIOS treats as auto, consistently mirrors the mixed‑mode results from earlier single‑rank testing, delivering better bandwidth but poorer latency, especially on Pi Prime. FGR shows a mixed picture: it excels in latency‑oriented scores (Pi Prime, 3D Mark physics) but lags in synthetic bandwidth tests, indicating its refresh‑interval halving benefits are workload‑dependent.
Adjusting the refresh timings—reducing TRFC1 to around 512 cycles and setting TRFC‑same‑bank to 384–400—significantly narrows the performance gap, allowing normal mode to reclaim CPU‑centric scores while still lagging in pure bandwidth tests. However, overly aggressive TRFC reductions trigger instability and erratic slowdowns before outright errors appear, a behavior also observed on Intel platforms. The dual‑rank configuration introduces anomalies not seen with single‑rank modules, notably mixed mode’s unexpected weakness on Pi Prime, suggesting the memory controller’s handling of rank‑interleaving interacts with refresh timing.
Overall, the analysis underscores that DDR5 refresh‑mode tuning on Ryzen 7000 CPUs is a delicate balance: while aggressive refresh reductions can recover lost cycles, the platform’s Infinity Fabric bandwidth ceiling and rank‑specific quirks limit the practical gains. Enthusiasts aiming for peak performance must weigh latency benefits of FGR against its bandwidth penalties and recognize that default mixed/auto settings may already be optimal for most real‑world workloads.
Original Description
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#overclocking #amd #ddr5 #ryzen #am5
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