The Problem with Just LUTs on an FPGA: No Way to Keep State

Why It Matters

Without flip‑flops, FPGA designs remain purely combinational, preventing any memory or sequential processing essential for functional hardware systems.

Key Takeaways

• LUTs compute combinational logic without storing any state.
• Pure LUT designs propagate signals instantly, lacking memory capability.
• Without flip‑flops, results cannot be retained for later use.
• Adding numbers and reusing results requires sequential elements on FPGA.
• Flip‑flops provide the necessary state storage for sequential circuits.

Summary

The video explains why relying solely on lookup tables (LUTs) in an FPGA prevents a design from retaining any state. LUTs implement pure combinational logic: they map inputs directly to outputs, so as soon as inputs change, outputs update instantaneously, effectively at the speed of light. Because LUTs lack memory, they cannot hold intermediate results or remember previous values. The presenter illustrates this with a simple addition example—adding 5 and 7 and then using the sum later. With only LUTs, the sum would disappear as soon as the inputs change, making it impossible to store a variable for subsequent operations. To overcome this limitation, the video introduces flip‑flops as the essential sequential element. Flip‑flops capture and hold a value on a clock edge, providing the state storage that LUTs cannot. By integrating flip‑flops, designers can build pipelines, registers, and any logic that depends on historical data. The implication for FPGA developers is clear: any realistic design must combine combinational LUTs with sequential flip‑flops to achieve functional, stateful behavior. Ignoring this requirement leads to designs that cannot perform even basic arithmetic storage, limiting applicability in real‑world applications.