SIGARCH Blog (ACM)

SIGARCH Blog (ACM)

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Research‑oriented computer architecture blog with perspectives from academics and industry.

Fourth Data Prefetching Championship: Part I
NewsApr 27, 2026

Fourth Data Prefetching Championship: Part I

The fourth Data Prefetching Championship (DPC‑4), held with HPCA 2026, showcased a range of innovative prefetching algorithms evaluated against a baseline of Berti at L1D and Pythia at L2 under tight storage budgets. Keynote speakers from Huawei and Google emphasized...

By SIGARCH Blog (ACM)
Beyond Qubits: A Systems View of Hybrid CV-DV Quantum Computing
NewsApr 20, 2026

Beyond Qubits: A Systems View of Hybrid CV-DV Quantum Computing

At ASPLOS 2026 a tutorial introduced hybrid continuous‑discrete‑variable (CV‑DV) quantum computing, which treats qubits and oscillator modes as a unified computational resource. The session covered the physical foundations, new instruction set architectures, and the compilation stack that translates high‑level algorithms...

By SIGARCH Blog (ACM)
Computer Architecture’s AlphaZero Moment Is Here
NewsApr 10, 2026

Computer Architecture’s AlphaZero Moment Is Here

The paper argues that computer architecture has shifted from idea scarcity to evaluation scarcity, driven by large‑language models and autonomous pipelines. The open‑source Gauntlet system reproduced authors' solutions in 48 % of 85 recent ISCA/HPCA papers and proposed alternatives in another...

By SIGARCH Blog (ACM)
Spilling the Neural Tea: A Journey Down the Side-Channel
NewsApr 6, 2026

Spilling the Neural Tea: A Journey Down the Side-Channel

Recent research highlights the growing use of side‑channel attacks to reverse‑engineer deep neural networks, revealing model architectures and, in limited cases, weight information. Physical side channels on edge devices and micro‑architectural channels in cloud environments have demonstrated success in extracting...

By SIGARCH Blog (ACM)
To Sparsify or To Quantize: A Hardware Architecture View
NewsMar 12, 2026

To Sparsify or To Quantize: A Hardware Architecture View

Hardware architects face a trade‑off between sparsity and quantization for compute‑bound generative AI models. Unstructured sparsity offers maximal pruning but forces complex routing and poor SIMD utilization, prompting a shift toward structured patterns like N:M and block‑sparse attention. Quantization reduces...

By SIGARCH Blog (ACM)