Are CCD Memories Coming Back?
Researchers at imec are reviving charge‑coupled device (CCD) memory by adapting the 3D NAND "Punch & Plug" process. By stacking three‑to‑four‑transistor CCD cells vertically and using an IGZO channel, the new design could become denser and cheaper than DRAM, whose capacitor scaling is hitting limits. A planar prototype presented at the 2024 IEEE IEDM conference demonstrated strong performance, and a full 3D part is expected soon. The technology targets AI‑centric compute‑in‑memory chips, positioning CCDs as a viable DRAM replacement.
Revolutionary New DDR Standards Expected
The article reviews the historical scaling limits of DDR DRAM and highlights that DDR5 now supports only one DIMM per channel, a trend that may continue with DDR6. Industry insiders speculate that DDR7 could eliminate DIMMs entirely, dramatically reducing bus...
Is a 96% Lower-Power NAND Coming?
Samsung researchers demonstrated a ferroelectric transistor that can cut NAND flash power consumption by up to 96%, integrating it into planar and 3‑D NAND strings. The approach replaces the traditional polysilicon channel or charge‑trap layer with a hafnium‑based ferroelectric oxide,...