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Venture CapitalNewsFabless Semiconductor Startup Vervesemi Raises $10 Mn in Series A Round
Fabless Semiconductor Startup Vervesemi Raises $10 Mn in Series A Round
EntrepreneurshipHardwareAIVenture Capital

Fabless Semiconductor Startup Vervesemi Raises $10 Mn in Series A Round

•February 18, 2026
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Entrackr
Entrackr•Feb 18, 2026

Why It Matters

The capital infusion positions Vervesemi to scale AI‑driven analog solutions, addressing reliability and yield challenges in high‑growth sectors such as EVs and smart energy. Its progress signals increasing investor confidence in niche fabless players that blend machine learning with semiconductor design.

Key Takeaways

  • •$10M Series A led by Ashish Kacholia, Unicorn India
  • •Funds target ML‑enhanced analog IC commercialization
  • •New motor control line serves EVs, drones, automation
  • •Portfolio includes 140 IP blocks, 25 IC variants, 10 patents
  • •Partnerships with Samsung SAFE and UMC expand fabless ecosystem

Pulse Analysis

Vervesemi's $10 million Series A, co‑led by Ashish Kacholia and Unicorn India Ventures, marks a significant infusion of capital into India's fabless semiconductor scene. The round follows a modest seed raise of $500 k and reflects growing investor confidence in AI‑driven analog solutions. By earmarking the proceeds for accelerated commercialization, the startup aims to scale its machine‑learning‑enhanced signal‑chain ICs across Asia, the United States, and other high‑growth semiconductor markets. This funding milestone also underscores the broader trend of venture firms backing niche chip designers that address reliability and yield challenges in mission‑critical applications.

Vervesemi differentiates itself by embedding machine‑learning algorithms directly into analog and mixed‑signal IP, a strategy that boosts yield, reliability, and system‑level performance without sacrificing power efficiency. The company recently validated its ML‑enabled signal chain in silicon, securing multiple production‑stage customers in industrial and smart‑energy sectors. A notable addition is its motor‑control portfolio, engineered for high‑efficiency electric vehicles, drones, and automation equipment, featuring precision sensing and fault‑detection intelligence. These offerings expand the startup’s addressable market and position it as a key supplier for next‑generation edge devices that demand robust analog front‑ends.

Strategic alliances amplify Vervesemi’s fabless model: as an IP partner in Samsung’s Advanced Foundry Ecosystem and with UMC, the startup gains access to leading process nodes and rapid prototyping services. These collaborations, combined with a growing catalog of over 140 IP blocks, 25 IC variants, and ten patents, enhance its credibility among OEMs in space, defence, and smart‑energy markets. The infusion of Series A capital will also fund expanded R&D and a go‑to‑market push, potentially accelerating adoption of AI‑augmented analog chips and reshaping supply‑chain dynamics in a sector traditionally dominated by legacy players.

Fabless semiconductor startup Vervesemi raises $10 Mn in Series A round

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