XYZ Remains the Overlooked Bottleneck in AI
'People haven't realised that XYZ is the main AI bottleneck'. We did, years ago, it's been there, we've spoken about it. Sorry you missed it. Or rather, it feels like you're just making a post for clicks and shock value.
Ajinomoto's Factory Fire Fuels Decade-Long MSG Controversy
We did back when the factory had a fire. People have been making content around Ajinomoto for years/decade regarding ABF. But also MSG. :)
HB3DM Demo Achieves 10 GB/Stack, 5.3 TB/S
News from @Intel and @SoftBank SAIMEMORY from @VLSI_2026 Paper T17.5 First demo of HB3DM ➡️ 9 layer, 3 micron per stack ➡️ 1 logic + 8 DRAM layers, ➡️ 13.7k TSVs/layer with hybrid bonding ➡️ 1.125 GB/layer, so 10 GB per stack ➡️ 0.25 Tb/sec/mm2...
World's First 1000‑Layer QLC Flash Multi‑Stacked Cell Array
News from @KIOXIAAmerica at @VLSI_2026 Paper T1.4 World's first Multi-Stacked Cell Array scalable to 1000+ layer stacked QLC Flash ➡️ Quad-Level Cell using MSA-CBA ➡️ Overcomes cell degredation, wafer warpage, and large blcok size ➡️ Uses F2F and B2F Cu bonding for 2x218 WL ➡️...
TSMC's A16 Chip Delivers Super Power Rail Gains
News from @TWSemicon at @VLSI_2026 Paper T1.5 TSMC will present their A16 technology ➡️ A16 is N2P with backside power delivery ➡️ TSMC calls BSPDN 'Super Power Rail' ➡️ +8-10% perf or +15-20% power saving ➡️ Up to +8-10% chip density (logic + SRAM) ➡️ Mass...
Intel 18AP Delivers Up to 18% Power Gains, 9% Performance Boost
News about @Intel 18AP from @VLSI_2026 Paper T1.2 Intel 18AP will offer 9% perf or 18% power over 18A ➡️ New VT pairs, low and high power devices ➡️ Numbers based on Arm core sub-block ➡️ 30% skew corner tightening ➡️ Matched SRAM Vmin Conference is...
Older Games Can Outshine Modern Graphics
So it's not just my imagination that some of the older games actually look better than today
We Prioritized Subprime Mortgages over Early AI
we could have had AI twenty years ago but nooooo we were too busy with sub-prime mortgages
Sharing Embargoed Samples May Violate NDA, Even After Release
If one media org under temporary NDA ships their sample to another media org who isn't under that NDA, but they both post results after the embargo, did the first technically break their NDA? 🤔 What if they then admit...
At Scale, H100 GPUs Fail Hourly Despite
Using the following data, the mean time between failures for a single GPU is 5.8 years. "419 unexpected interruptions over 54 days on 16,384 H100s" If you have 50k GPUs, that's one per hour. If you have 2.1k GPUs, that's one per day.
TSMC's Kevin: GAA Scaling Eliminates Need for Alternative
That's not what Kevin from TSMC said. He said the GAA technology they're developing is showing scaling and robustness to not need it.
Networking Highlights at TSMC Tech Symposium – Ask Me Anything
Some super fun times at @TSMC Tech Symposium today. Lots of great conversations with old friends and new friends. Will write something up / video. But happy to answer questions. https://t.co/8ggwvCyBG5
Bolt's Zeus Chip Paves Way for Silicon Path Tracing
"Moving from a rasterized pipeline in silicon to path tracing in silicon, at scale, is not an easy thing to do," said Dr. Ian Cutress, chief analyst, More Than Moore. "Bolt Graphics' Zeus test chip is an important first step...
CEO Discusses Monetization and New Agentic EDA Stack
Here at #CadenceLIVE, CEO @OfficialADevgan held an Analyst Q&A session - we had questions about monetization but also about the agentic stack coming to EDA. Full transcript now available at More Than Moore. https://t.co/8poqXP70GG https://t.co/nj1YcE6nGL
Broadcom Showcases Chip Design Size Evolution at Cadence Live
Our friend @CharlieKawwas from @Broadcom showing off chip design size evolution here at #CadenceLive https://t.co/UjiCdK7EYz
Cadence Sets Ambitious 2026 IP Bandwidth Targets
IP targets for @Cadence in 2026. 😎 ➡️ HBM4/4E 16G ➡️ LP6 at 14.4G ➡️ PCIe 8.0 and 448G ➡️ Intel 18AP and 14AE #CadenceLive https://t.co/DYAF0yQT2Z
Cadence Tools Can Be Accelerated on Snapdragon CPU/GPU
Pretty sure I just heard Anirudh claim you can accelerate Cadence tools on Qualcomm Snapdragon CPU and GPU. 😉
ML-Driven Chip Design Tackles Chiplets and Multiphysics
https://t.co/hSBxqyOfWZ I spent time with @Synopsys CEO Sassine Ghazi to ask what the future of chip design is. Actually they're one of the earliest adopters, and ML chips want even more ML to optimize them. Add in chiplets and multiphysics, and...
Podcast Reveals Our Candid Thoughts on Top AI Startups
https://t.co/jf50aClz4V Remember those AI companies @Sallywf and I presented on Monday? Well here's our mental download podcast on what we *actually* think. Featuring @GroqInc, @Etched, Neuchips, @SambaNovaAI, @taalas_inc, and @positron_ai. https://t.co/cSbCvDhKln
AMD‑Arm 2014 Opteron A1120 Packs Eight Cortex
I finally got one. @AMD x @Arm in 2014. Opteron A1120, aka AMD Seattle Up to 8x Cortex-A57, 4MB L2, 8MB L3 128-bit DDR3/4-1866 PCIe 3.0 x8 and 2x10GbE https://t.co/w08sMceEPB