CPO, Hybrid Bonding, PLP Featured At ECTC

Key Takeaways

• Applied Materials demos 450nm hybrid bonding with 98% yield across 20M interconnects
• ASML proposes die distortion correction achieving sub‑80nm overlay for die‑to‑wafer bonding
• Resonac shows panel‑level CMP delivering <100nm co‑planarity on 320 mm glass panels
• GlobalFoundries and Corning unveil glass waveguide connector for CPO with <1.5 dB loss
• Intel reports edge‑coupling CPO connector maintains –1.55 dB loss over 100 plug/unplug cycles

Pulse Analysis

The upcoming ECTC conference underscores a pivotal shift in semiconductor packaging, where traditional chip‑in‑package approaches are giving way to ultra‑dense integration techniques. Hybrid bonding, once confined to niche applications like 3D NAND, is now being pushed to 450 nm pitch with near‑perfect yields, thanks to process refinements in metallization, CMP, and annealing. Applied Materials’ joint system with BE Semiconductor and ASML’s precision overlay corrections illustrate how equipment vendors are tackling the twin challenges of finer pitch and tighter alignment, setting the stage for sub‑300 nm scaling.

Beyond bonding, panel‑level packaging (PLP) promises a leap in throughput and cost efficiency by processing dozens of dies on large glass substrates. Resonac’s work on co‑planarization and Ushio’s stitching‑free exposure across an 18‑reticle area demonstrate that the industry can now achieve sub‑100 nm uniformity and high‑resolution patterning on panels previously deemed too unwieldy. These advances reduce per‑die overhead, making high‑bandwidth memory (HBM) and AI‑centric interposers more economically viable for volume production.

Co‑packaged optics (CPO) rounds out the innovation suite, targeting the data‑center market where power and latency are paramount. The detachable glass waveguide connector from GlobalFoundries and Corning, along with Intel’s robust edge‑coupling architecture, deliver sub‑1.5 dB losses and repeatable performance over hundreds of plug‑unplug cycles. By integrating photonics directly at the package level, CPO reduces electrical‑to‑optical conversion distance, boosting data rates while slashing energy consumption—a critical advantage as AI workloads continue to scale. Collectively, these technologies signal a rapid convergence of packaging, optics, and manufacturing that will define the next generation of high‑performance computing.