Impact of Sapphire Substrate Reconstruction on the Structural, Electronic, and Photonic Properties of MoS2

Why It Matters

Substrate‑induced heterogeneity can mislead optical metrology and degrade device uniformity, making interface control essential for scalable 2D electronics manufacturing.

Key Takeaways

• Higher growth temperature induces sapphire step‑bunching.
• Step edges cause charge‑doping variations in MoS₂.
• Raman/PL spectra broaden due to substrate strain.
• Transferred MoS₂ shows uniform optical and electronic behavior.
• Residual Mo/S residues concentrate at reconstructed step edges.

Pulse Analysis

Two‑dimensional transition‑metal dichalcogenides such as MoS₂ have moved from laboratory curiosities to candidates for commercial photodetectors, flexible electronics, and sub‑10 nm transistors. Achieving wafer‑scale uniformity relies on chemical vapor deposition, where the choice of growth substrate dictates nucleation density, grain orientation, and ultimately film quality. Single‑crystal c‑plane sapphire is favored because its lattice matches many TMDs and it offers an atomically flat surface. However, the extreme temperatures required for epitaxial growth can remodel the sapphire surface, creating step‑and‑terrace reconstructions that subtly alter the overlying 2D layer.

The study by Torsi et al. demonstrates that raising the MOCVD temperature from 900 °C to 1 000 °C triggers pronounced step‑bunching on sapphire, producing edges up to 0.6 nm high. Kelvin‑probe force microscopy shows these edges generate local surface‑potential fluctuations, which translate into spatially varying charge‑doping of the MoS₂ monolayer. Raman and photoluminescence maps recorded on as‑grown films reveal broadened peaks, shifted mode frequencies, and heterogeneous emission intensity—signatures of strain and trion formation induced by the reconstructed substrate. Once the film is transferred to SiO₂/Si, the optical response and back‑gated FET performance become uniform, confirming that the heterogeneity originates at the growth interface rather than intrinsic material defects.

These observations have immediate relevance for the semiconductor supply chain. Optical metrology that assumes homogeneous Raman or PL signatures may misinterpret substrate‑induced shifts as material imperfections, leading to erroneous quality metrics. Moreover, the residual Mo and S species that linger at step edges after transfer can affect device reliability, underscoring the need for post‑growth surface cleaning or engineered substrate terminations. Industry adopters should therefore integrate temperature‑controlled annealing protocols, miscut engineering, or alternative buffer layers to suppress reconstruction. By mastering the sapphire‑MoS₂ interface, manufacturers can ensure consistent device performance across large wafers and accelerate the commercialization of 2D semiconductor technologies.