The ability to engineer MFTJs with all‑vdW components opens a low‑power pathway for spintronic memory and logic that can be integrated with emerging 2D electronic platforms.
The breakthrough centers on a modular vdW architecture where each atomic layer contributes a distinct functional property. Ferromagnetic Fe₃GeTe₂ provides spin‑polarized electrodes, while ferroelectric CIPS or In₂Se₃ supplies a switchable polarization that reshapes the tunneling barrier. First‑principles calculations show that the work‑function disparity between opposite surfaces of the ferroelectric layer can be engineered by selecting the stacking sequence, directly influencing the barrier height and the resulting electro‑resistive effect.
Experimental validation confirms that these heterostructures deliver measurable tunnel magnetoresistance alongside a pronounced electroresistance, with the tunneling current toggling by more than an order of magnitude under modest pulse voltages. The devices retain sharp ferroelectric hysteresis at room temperature and exhibit repeatable switching over thousands of cycles, indicating robustness for practical applications. Moreover, the all‑vdW fabrication leverages dry‑transfer and standard lithography, ensuring compatibility with existing 2D material production lines.
From a market perspective, the ability to co‑control magnetic and electric states in a single atomically thin stack promises ultra‑dense, non‑volatile memory that consumes far less energy than conventional charge‑based technologies. Spintronic logic gates could also benefit from the rapid, voltage‑driven switching demonstrated here, accelerating the integration of memory and processing. As the semiconductor industry seeks alternatives to Moore’s law scaling, vdW‑engineered MFTJs offer a compelling route to combine high‑speed operation with the low‑power advantages of ferroelectric control, positioning them as a strategic asset for next‑generation computing architectures.
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