Day in the Life of a Nano@stanford Intern

Stanford
StanfordMay 20, 2026

Why It Matters

Early, practical exposure to semiconductor tools and process optimization helps build the skilled workforce needed for advanced chip fabrication and improves lab tool performance and yield. This kind of training can accelerate career pathways and support innovation in microelectronics manufacturing.

Summary

Connor Short, a community-college intern at Stanford’s Nano facility, outlines daily responsibilities that range from restocking consumables and maintaining safety protocols to preparing and cleaning silicon wafers for microfabrication. Interns run monitoring processes and use atomic layer deposition tools to grow oxide layers, while Connor’s individual project focuses on optimizing pulse timing for a silicon precursor. Routine tasks also include chemical handling under fume hoods and quality checks on equipment performance. He says hands-on access to the facility has allowed him to translate classroom learning into real-world chip-processing skills.

Original Description

Meet Connor Short, electrical engineering student at Foothill Community College and an intern in the Stanford Nanofabrication Facility, which supports more than 600 researchers a year in fields ranging from electronics and optics to biology and medicine.
MB015ZLMXFRRHPX

Comments

Want to join the conversation?

Loading comments...