CORRECTING and REPLACING Panmnesia to Mass-Produce PCIe 6.4-CXL 3.2 Fusion Switch

CORRECTING and REPLACING Panmnesia to Mass-Produce PCIe 6.4-CXL 3.2 Fusion Switch

Business Wire — Executive Appointments
Business Wire — Executive AppointmentsApr 16, 2026

Why It Matters

The switch can slash AI data‑center CAPEX and OPEX by simplifying interconnect topology and cutting latency, giving enterprises a performance‑per‑dollar advantage as large‑scale models proliferate.

Key Takeaways

  • Only silicon fully CXL 3.2 compliant with Port‑Based Routing
  • Supports PCIe Gen 6 64 GT/s and all CXL sub‑protocols
  • Enables rack‑scale fabric via cascading, eliminating Ethernet bottlenecks
  • Ultra‑low‑latency controller delivers double‑digit nanosecond response
  • Early‑access program underway after $60 M Series A funding

Pulse Analysis

The data‑center interconnect market is undergoing a rapid shift as PCIe 6.0 and the CXL (Compute Express Link) standard converge to meet the bandwidth and latency demands of generative AI and high‑performance computing. PCIe 6.4 doubles the raw data rate to 64 GT/s, while CXL 3.2 adds coherent memory semantics across CPUs, GPUs, and accelerators. Vendors that can combine both protocols on a single silicon die are positioned to simplify system design, reduce component count, and accelerate time‑to‑market for AI‑driven services.

Panmnesia’s fusion‑switch distinguishes itself with Port‑Based Routing, a method that frees designers from the rigid tree topologies of traditional hierarchy‑based routing. By allowing any device to connect to any port, the chip shortens data paths and enables direct peer‑to‑peer transfers with minimal CPU intervention. The built‑in cascading capability lets dozens of switches be linked into a unified fabric that spans multiple racks, effectively creating a low‑latency, high‑throughput network without resorting to Ethernet. Coupled with a proprietary controller that delivers double‑digit nanosecond latency, the solution promises measurable gains for workloads such as large language models, recommendation engines, and MPI‑based simulations.

For enterprise AI builders, the promise of lower CAPEX and OPEX translates into faster scaling of compute clusters and more predictable operating costs. Panmnesia’s recent $60 million Series A round, valuing the company at $250 million, signals strong investor confidence and provides the capital needed to ramp up volume production in the second half of 2024. As major cloud providers and HPC vendors evaluate alternatives to legacy Ethernet fabrics, a fully CXL‑compliant, PCIe‑Gen 6 switch could become a de‑facto standard, pressuring incumbents to add similar routing flexibility or risk losing market share.

CORRECTING and REPLACING Panmnesia to Mass-Produce PCIe 6.4-CXL 3.2 Fusion Switch

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