Semiconductors News and Headlines

NVIDIA Confidential Computing Powers Apple Intelligence
NewsJun 12, 2026

NVIDIA Confidential Computing Powers Apple Intelligence

NVIDIA’s Confidential Computing GPUs are now powering Apple’s Private Cloud Compute (PCC) for confidential inference, extending the workload from Apple‑owned data centres to Google Cloud. The deployment couples NVIDIA Blackwell GPUs with Intel CPUs that support TDX and Google’s Titan...

By EE Times Europe
Apple iPhone 17e Teardown: A19 Processor, SK Hynix Memory & BOM Analysis
NewsJun 11, 2026

Apple iPhone 17e Teardown: A19 Processor, SK Hynix Memory & BOM Analysis

Apple’s new iPhone 17e (model A3575) introduces the A19 application processor, 8 GB LPDDR5X RAM and a 256 GB 4D NAND storage package sourced from SK Hynix. The entry‑level device adds 15 W MagSafe/Qi2 wireless charging, a feature missing from the iPhone 16e. TechInsights’ teardown shows...

By TechInsights – Blog/News
The PCIe 5.0 Tax: Intel's Z990 Chipset for Nova Lake Runs Hotter and Uses More Power Despite Shrinking
NewsJun 11, 2026

The PCIe 5.0 Tax: Intel's Z990 Chipset for Nova Lake Runs Hotter and Uses More Power Despite Shrinking

Intel’s upcoming Nova Lake platform will feature a dramatically smaller Z990 PCH, dropping from roughly 92.9 mm² to 72.5 mm². Despite the size reduction, the chipset’s power draw rises, with a base consumption of 7.9 W and peaks up to 14 W when PCIe 5.0...

By TechSpot
RISC-V Targets Data Centers, Edge AI, Space
NewsJun 11, 2026

RISC-V Targets Data Centers, Edge AI, Space

At the RISC‑V Summit Europe 2026, RISC‑V International announced that the open‑standard ISA is moving beyond microcontrollers into data‑center servers, edge AI, and spaceflight. The newly ratified RISC‑V Server Platform Specification 1.0 standardizes boot and runtime services, prompting a wave of...

By EE Times – Designlines/AI & ML
Imec Adds High-Density MIMCAPs, Passive Modeling and Laser-Assisted Bonding to 300mm RF Silicon Interposer Platform
NewsJun 11, 2026

Imec Adds High-Density MIMCAPs, Passive Modeling and Laser-Assisted Bonding to 300mm RF Silicon Interposer Platform

Imec has upgraded its 300 mm RF silicon interposer platform with high‑density MIM capacitors, a scalable passive‑component modeling framework, and laser‑assisted bonding for III‑V chiplet assembly. The new MIMCAP design delivers 10‑to‑100× higher capacitance density, while the modeling tool accurately predicts...

By Semiconductor Today
Global Chip Equipment Spending Hits Record $36.55 Billion in Q1 as AI Investment Grows
NewsJun 11, 2026

Global Chip Equipment Spending Hits Record $36.55 Billion in Q1 as AI Investment Grows

Global semiconductor equipment spending reached a record $36.55 billion in Q1 2026, up 14% year‑over‑year and 1% versus the prior quarter. The surge was driven primarily by AI‑related capacity expansion and technology upgrades across advanced logic, DRAM and advanced packaging lines. AI...

By SemiMedia Global
Re-Architecting Die-to-Die IO For AI
NewsJun 11, 2026

Re-Architecting Die-to-Die IO For AI

Synopsys unveiled its 3DIO solution IP, a fully digital die‑to‑die I/O architecture designed for hybrid‑bonded 3D stacks. The PHY supports 4‑6 Gb/s per link at under 0.05 pJ/bit and scales through a cluster‑based design with built‑in redundancy and BIST. By eliminating analog...

By Semiconductor Engineering
Photonics Emerges as Next Scaling Frontier for AI Infra, Distributed Computing
NewsJun 11, 2026

Photonics Emerges as Next Scaling Frontier for AI Infra, Distributed Computing

Photonics is moving from telecom niches into the core of AI‑era computing, appearing in data‑center interconnects, chip‑to‑chip links, and even as dedicated optical processors. The surge is driven by AI workloads that are limited more by data movement, memory bandwidth...

By EE Times Asia
I'd Have Vetoed Foreign Sale of UK Tech Giant, Says Business Secretary
NewsJun 10, 2026

I'd Have Vetoed Foreign Sale of UK Tech Giant, Says Business Secretary

Business Secretary Peter Kyle said he would have blocked SoftBank’s 2016 purchase of ARM Holdings, a deal he now views as a missed chance to keep a trillion‑dollar tech champion in Britain. He also lamented Google’s 2014 acquisition of DeepMind,...

By BBC Business
Michael Chapman, CEO of Cortus, on RISC-V, AI, and Europe’s Semiconductor Future
NewsJun 10, 2026

Michael Chapman, CEO of Cortus, on RISC-V, AI, and Europe’s Semiconductor Future

Michael Chapman, CEO of Cortus, explains how the company’s evolution from 32‑bit embedded IP to advanced RISC‑V processors positions it at the heart of Europe’s drive for semiconductor sovereignty. He argues that open‑source RISC‑V offers the flexibility and rapid innovation...

By EE Times Europe
EPC2378 25V, 410µΩ eGaN Enters Mass Production for High-Density DC–DC Conversion
NewsJun 10, 2026

EPC2378 25V, 410µΩ eGaN Enters Mass Production for High-Density DC–DC Conversion

Efficient Power Conversion (EPC) announced that its EPC2378 25 V eGaN power transistor is now in mass production. The device offers a best‑in‑class 410 µΩ typical R_DS(on) and a low R_DS(on)×Q_G figure of merit, supporting up to 101 A continuous current in a...

By Semiconductor Today
NVIDIA Chip Powers Local AI Workloads
NewsJun 10, 2026

NVIDIA Chip Powers Local AI Workloads

NVIDIA unveiled the RTX Spark, a super‑chip delivering up to one petaflop of AI compute for Windows PCs. It pairs a Blackwell RTX GPU with 6,144 CUDA cores, fifth‑generation Tensor Cores, and 128 GB unified memory, linked via NVLink‑C2 to a 20‑core...

By EDN
How Fleet Learning Works Under Bounded Gate Authority
NewsJun 10, 2026

How Fleet Learning Works Under Bounded Gate Authority

The third article in the silicon‑governance series explains how fleet learning must operate under bounded gate authority. Fleet learning aggregates field telemetry to spot macro‑scale failure signatures, structural drift, and systemic patterns across AI accelerators, chiplets, and data‑center clusters. However,...

By EDN
AMD Venice EPYC 256-Core Zen 6 Rack Benchmark Shows 100kW Performance Scaling
NewsJun 10, 2026

AMD Venice EPYC 256-Core Zen 6 Rack Benchmark Shows 100kW Performance Scaling

AMD released early benchmark data for its next‑generation EPYC “Venice” processor, built on Zen 6 and a 2 nm‑class node. Using a 256‑core configuration, AMD measured rack‑level throughput under a fixed 100 kW power budget, achieving a normalized score of 3.30, more than...

By Guru3D