Trump Approved an Nvidia Chip for Sale in China. Beijing Doesn’t Want It.
President Trump lifted a long‑standing export ban, allowing Nvidia to sell its high‑performance H200 AI chip to China. The move was touted as a win for Chinese artificial‑intelligence ambitions and a revenue boost for Nvidia, the world’s leading AI‑chip maker. Six months later, Beijing has refused to purchase the chip, preferring domestic alternatives amid a push for technological self‑reliance. The deadlock underscores how geopolitical rivalry can neutralize policy shifts and leave advanced hardware idle.
Scaling the Memory Wall: HBM, CXL, and the New GPU Playbook
The AI data‑center market is confronting a growing memory wall as inference workloads demand ultra‑low latency and massive KV‑cache capacity. High‑bandwidth memory (HBM) remains the primary bandwidth solution, but supply constraints and thermal costs are driving prices up, with the...
AMD EPYC Venice Enters Production on TSMC 2nm Process
AMD announced that its next‑generation EPYC “Venice” processor is now ramping production at TSMC’s 2 nm fab in Taiwan, with later production planned for TSMC’s Arizona plant. Venice is the first high‑performance server CPU built on the 2 nm node, targeting cloud,...
Nvidia Revenue Jumps 85% on AI Demand
Nvidia reported record first‑quarter fiscal 2027 revenue of $81.6 billion, an 85% year‑on‑year jump driven by soaring AI infrastructure demand. The data‑center segment generated a historic $75.2 billion, up 92%, while networking revenue exploded 199% to $14.8 billion. Edge‑computing sales rose 29% to...
AMD to Invest $10 Billion in Taiwan's AI Industry to Advance Top-End Chips
AMD announced a $10 billion investment in Taiwan's semiconductor and AI ecosystem, targeting advanced chip packaging and manufacturing. The program will partner with local firms such as ASE, SPIL, Sanmina, Wiwynn, Wistron and Inventec to accelerate development of its Helios AI...
Advancing Heterogeneous Integration Through Industry Roadmap Improvements
A multinational research team led by Intel published a perspective in Nature Reviews Electrical Engineering calling for a new generation of heterogeneous integration (HI) roadmaps. The paper argues that existing roadmaps lag behind rapid advances in AI, 5G/6G, and aerospace,...
Semidynamics and SiPearl to Develop EU-Sovereign Rack-Scale AI Compute Platform
Semidynamics and SiPearl announced a joint effort to build a European‑sovereign, rack‑scale AI compute platform that pairs SiPearl’s Arm‑based CPU with Semidynamics’ RISC‑V AI inference ASIC. The system will adhere to Open Compute Project standards, delivering high density, performance‑per‑watt and...
Fraunhofer IPMS Develops Wafer-Level Chiplet Systems
Researchers at Germany’s Fraunhofer Institute for Photonic Microsystems (IPMS) have unveiled a wafer‑level quasi‑monolithic integration (QMI) technique that embeds chiplets into structured silicon pockets and levels them for back‑end‑of‑line wiring. The method bridges the gap between traditional chip packaging and...
Infineon 40V CoolGaN BDS Family Shrinks Portable Power Designs
Infineon has added two GaN bidirectional switches, the IGK048B041S and IGK120B041S, to its 40 V CoolGaN BDS family. The devices shrink PCB footprints by up to 82 percent and halve the component count by merging two MOSFETs into a single package. Both...
Scaling the Next Generation of Multi-Die Systems
The EE Times virtual conference on June 23‑24 will examine how to scale next‑generation multi‑die chiplet systems for AI workloads. Sessions focus on accelerating design flows, advanced packaging, interconnect standards and the thermal, power and yield challenges that arise at production...
Data Center Revenue Soars 92% as NVIDIA Turns in Another Record-Breaking quarter...and the Share Price Falls
Nvidia reported a record $81.6 billion revenue for Q1 2027, driven by data‑center sales that jumped 92% year‑on‑year to $75.2 billion. Net income surged to $58.32 billion, yet the stock slipped as investors worried about sustaining the pace. CEO Jensen Huang highlighted the arrival...
Acer Veriton GN100 Packs NVIDIA Blackwell AI Compute Into Compact Workstation
Acer unveiled the Veriton GN100, a compact AI workstation built around NVIDIA’s DGX Spark platform and the GB10 Grace Blackwell Superchip. Despite measuring only 150 mm × 150 mm × 50.5 mm, the system delivers up to 1 petaFLOPS of AI performance, 128 GB of unified LPDDR5x memory, and a 4 TB...
Imec Unveils Quantum Dot Qubit Device Using High NA EUV Lithography
imec demonstrated a silicon quantum dot qubit array fabricated with High NA EUV lithography at ITF World. The device features 6‑nm gate gaps, enabling dense qubit integration compatible with 300 mm CMOS fabs. This marks the first integrated hardware using High...
AMD Ryzen AI Max 400 ‘Gorgon Halo’ Packs up to 192GB of Unified Memory — Refreshed APU Uses Zen 5...
AMD has refreshed its Ryzen AI Max line with the Gorgon Halo‑based Max 400 series, offering up to 192 GB of unified memory and Zen 5/ RDNA 3.5 cores. The top Max+ Pro 495 model clocks a 5.2 GHz boost, 16 CPU cores, and a 40‑CU Radeon 8065S iGPU. AMD positions...
AMD Launches New Ryzen Processors and Ryzen AI Halo Dev Platform
AMD unveiled the Ryzen AI Halo developer platform, now available for pre‑order at $3,999 and powered by the Ryzen AI Max+ 395 processor with up to 128 GB unified memory and 50 TOPS AI performance. The company also announced the upcoming Ryzen...
Cerebras Says Its Chips Run a Trillion-Parameter AI Model Nearly 7 Times Faster than GPU Clouds
Cerebras Systems announced that its wafer‑scale CS‑3 chip can run Moonshot AI’s trillion‑parameter Kimi K2.6 model at 981 tokens per second, 6.7× faster than the leading GPU‑based cloud provider and 23× faster than the median. In a 10,000‑token coding task, Cerebras...
Four-Tier Memory Hierarchy for LLM Reasoning (USC, UW)
Researchers at USC and UW introduced a semantics‑aware memory hierarchy that partitions LLM token caches across four storage tiers—HBM, DDR, compressed, and evicted. By scoring token importance with cumulative attention, low‑importance tokens are offloaded to CPU memory and prefetched without...
Memory Makers Brace for Hydrogen Fluoride Pricing Shock as Hormuz Blockade Impacts Supply Chain — Key Etching and Cleaning Material...
The war in Iran and the resulting Hormuz blockade have disrupted the supply chain for anhydrous hydrogen fluoride, a key etchant used in memory‑chip fabrication. Prices in China have surged 130 % over early‑2026 levels as sulfuric‑acid costs jump 27 % and...
CPU IP Processes Mixed Scalar and Vector Workloads
SiFive unveiled its Performance P570 Gen 3, a RISC‑V out‑of‑order superscalar processor IP that blends scalar and vector execution. The chip promises a sizable performance uplift over the earlier P550 Gen 1 and complies with the mandatory RVA23 profile, including Hypervisor and...
India Just Signed Its Most Consequential Chip Deal. The Hard Part Starts Now.
India and the Netherlands sealed a landmark MoU between Tata Electronics and ASML, committing the Dutch firm to supply EUV lithography tools and support for a new semiconductor fab in Dholera, Gujarat. The plant, built with a 50 % government stake...
Hoth Plans Rocket One Rebrand and AI Chip Pivot
Hoth Therapeutics announced it will rename itself Rocket One, Inc. and restructure to focus on artificial‑intelligence semiconductor and spintronic computing technologies, while keeping its biotech programs in a separate subsidiary. The company secured exclusive licenses from Virginia Commonwealth University for...
When Arm Meets RISC-V: SiPearl, Semidynamics to Co-Develop Sovereign AI Platform
SiPearl and Semidynamics announced a joint effort to build Europe’s first sovereign rack‑scale AI platform, pairing SiPearl’s Arm‑based Rhea2 CPUs with Semidynamics’ RISC‑V inference accelerators. The first‑generation system will rely on DDR memory for the CPUs and full CPU‑accelerator memory...
China Reportedly Blocks NVIDIA GeForce RTX 5090 D V2 Imports
Chinese customs have reportedly denied import permits for NVIDIA's GeForce RTX 5090 D v2, a GPU specifically engineered for the Chinese market. The block appears to originate from Chinese regulators rather than new U.S. export controls, catching NVIDIA off guard. Because the card...
Intel Nova Lake ES Chips Reportedly Double Multi-Core Performance
Intel has begun shipping engineering samples of its next‑generation Core Ultra 400 (code‑named Nova Lake) desktop processors to hardware partners for validation. The chips introduce a redesigned hybrid architecture with Coyote Cove performance cores and Arctic Wolf efficiency cores, and feature...
Quantum Diamond Microscopy – Solving the Inspection Gap in Advanced Packaging
Quantum diamond microscopy (QDM) is now being deployed in semiconductor failure‑analysis labs across the US, Europe and Asia, offering the first non‑destructive, direct measurement of electrical current inside fully assembled advanced packages. By imaging magnetic fields generated by current, QDM...
TSMC Lays Out ‘Three-Layer Cake’ Vision for AI Chips
Taiwan Semiconductor Manufacturing Company unveiled a "three‑layer cake" roadmap that fuses its 2nm N2 compute node, advanced 3D CoWoS packaging, and the Compact Universal Photonic Engine (COUPE) for high‑speed optical links. The strategy was announced at TSMC’s 2026 Technology Symposium...
NVIDIA Corp (NVDA) Q1 2027 Earnings Call Transcript
NVIDIA reported record Q1 2027 revenue of $82 billion, an 85% year‑over‑year increase and 20% sequential growth, propelled by explosive demand for its Blackwell AI GPUs. Data‑center revenue jumped 92% YoY to $75 billion, while free cash flow surged to $49 billion and...
AMD EPYC 8005 Is Out with Up to 84 Zen 5 Cores in a 225W TDP Package
AMD unveiled the EPYC 8005 series at MWC 2026, introducing full Zen 5 cores across a range of SKUs. The flagship 84‑core EPYC 8635P runs at a 225 W TDP and tops out at 4.5 GHz, while lower‑end models start at 8 cores. All chips support...
GPUs: A High-Throughput Architecture Confronting a Workload Shift
Graphics processing units still power large‑scale AI training, but frontier large language models are exposing a growing memory bottleneck. While Nvidia H100 GPUs can deliver petaflops of FP8 throughput, trillion‑parameter inference often falls below 10 FLOPs per byte, making bandwidth...
The Next 15 Years of Moore’s Law, According to Imec
Imec’s new 15‑year roadmap predicts the commercial debut of complementary FET (CFET) technology around 2033, effectively stacking PMOS and NMOS devices to halve circuit area. The institute also foresees a shift to two‑dimensional semiconductor channels by 2041 to boost power...
Nvidia Faces Mounting AI Chip Rivalry Ahead of Blockbuster Earnings
Nvidia is poised to report another blockbuster earnings quarter, but its near‑monopoly in AI training chips faces growing pressure as the market shifts toward inference workloads. Competitors such as Intel, AMD, Alphabet’s TPU business and Amazon’s Trainium are targeting the...
The $132 Billion Infrastructure Pivot You Might Have Missed
The server‑CPU market is projected to balloon to roughly $132 billion by 2030 as agentic artificial‑intelligence workloads shift demand from GPU‑centric training to CPU‑heavy inference. This structural pivot creates a 35% CAGR for legacy compute, with the specialized agentic‑CPU segment expected...
Infineon Expands XHP 2 CoolSiC MOSFET Portfolio with 2300 V Modules for Renewable Energy
Infineon Technologies has added 2300 V CoolSiC™ MOSFET variants to its XHP 2 power‑module family, targeting high‑voltage renewable‑energy converters. The new modules support DC‑link voltages up to 1500 V, feature on‑resistance between 1 mΩ and 2 mΩ, and offer 4 kV or 6 kV isolation. Leveraging silicon‑carbide...
Imec’s Patrick Vandenameele: Full-Stack Innovation Is the Name of the Game
Imec CEO Patrick Vandenameele said full‑stack, cross‑technology co‑optimization will drive semiconductor innovation over the next decade. He highlighted five shifts: angstrom‑scale system co‑optimization, silicon photonics, strategic memory, chiplet‑based edge computing, and industrial quantum computing. Imec is expanding its role with...
AMD EPYC Venice Reportedly Combines TSMC N2P and N2 CCD Designs
AMD’s upcoming EPYC “Venice” server line will employ two distinct chiplet (CCD) designs. The mainstream variant will use TSMC’s N2P process, delivering up to 96 cores per socket with 12 Zen 6 cores per CCD. A high‑density version will run on...
Uviquity Announces World’s First Chip-Scale Deep-UV Laser
Uviquity announced the world’s first chip‑scale deep‑UV laser operating at 229 nm, produced from a single semiconductor chip. The device leverages the company’s aluminum nitride photonic‑integrated‑circuit platform and second‑harmonic generation to deliver collimated, narrow‑line‑width output. Sampling for OEM partners begins in...
Variscite to Launch NXP i.MX 95-Based SoM Product Family
Variscite is set to launch a SMARC‑compatible system‑on‑module (SoM) built around NXP’s i.MX 95 processor. The VAR‑SMARC‑MX95 will deliver up to six Cortex‑A55 cores, dedicated real‑time co‑processors, and a 2 TOPS eIQ Neutron NPU for edge AI workloads. Three variants will embed...
Uncle Sam's Next Big Supercomputer Might Use Something More Exotic than GPUs
U.S. national labs are testing NextSilicon’s Maverick‑2 dataflow processor as a potential alternative to GPU‑centric supercomputers. Sandia National Laboratory’s 64‑node Spectra testbed, built with Penguin Solutions, recently met all system acceptance criteria, proving the chips can run key HPC workloads....
'I'm Sorry Dave': NASA Is Working on an AI Chip to Help Next-Generation Spacecraft Think for Themselves — so Clearly...
NASA’s High‑Performance Spaceflight Computing (HPSC) project is unveiling a new radiation‑hardened AI processor that promises up to 100 times the computing power of current spaceflight hardware, with early tests indicating performance as high as 500 times. The multicore chip is engineered to...
Banned Nvidia AI Chips Keep Reaching China Despite US Crackdown
U.S. authorities say banned Nvidia AI chips continue to reach China and Russia through encrypted broker networks, shell companies, and third‑country routes, prompting the Bureau of Industry and Security to levy $420 million in penalties, including a $252 million fine against Applied...
Trump's 25% Cut on Nvidia Chips Sold to China Backfired — Beijing Won't Approve a Single H200 Purchase, Costs Huang...
President Trump confirmed that Beijing has rejected all purchases of Nvidia's H200 AI chips, despite a Commerce Department clearance that could have unlocked $15‑$20 billion in sales. The 25% routing fee tied to the export framework sparked security concerns, prompting Chinese...
New Power, Memory, Interconnect, and Thermal Architectures for AI Infrastructure at Scale
The AI industry is pivoting from training to inference, which analysts expect to represent 85% of enterprise AI workloads within three years. This shift exposes four systemic bottlenecks—power, memory, thermal and copper interconnects—each limiting scale and efficiency. Companies are responding...
NoMIS Joins ARPA-E Project on High-Voltage SiC HVDC
NoMIS Power Corporation has become an industry partner in a three‑year, $2.5 million ARPA‑E DC‑GRIDS project led by Michigan State University. The consortium will develop high‑voltage 6.6 kV/2.5 kA Neutral Point Clamped Power Electronics Building Blocks (NPC‑PEBB) using NoMIS’s 3.3 kV SiC MOSFET portfolio,...
Exclusive: The ‘Lobby Wars’ Pitting Europe’s Chip Startups Against Semiconductor Giants
Six European semiconductor startups have banded together to launch a new lobby group called Voices, backed by the European Commission. The coalition seeks to amplify the interests of fledgling chip makers amid aggressive lobbying by industry giants such as Intel,...
Murata to Expand Thermistor Production Capacity with New Japan Facility
Murata Manufacturing announced the construction of a new five‑story production building at its Yokaichi Plant in Shiga, Japan, slated to begin in May 2026 and finish by August 2028. The $113 million investment will add roughly 2,951 m² of ground space and 18,010 m² of...
The Shifting Cost Structure of Advanced Manufacturing
The recent closure of the Strait of Hormuz has triggered a cascade of supply‑chain shocks for the semiconductor industry, most notably a sharp rise in helium prices and a collapse in Gulf air‑cargo capacity. These disruptions expose the sector’s heavy...
India Unprepared as AI Memory Crunch Looks Set to Deepen: Micron CBO
Micron’s executive vice‑president Sumit Sadana warned that global AI‑driven memory demand far exceeds supply and could remain tight beyond 2028. The shortage is most acute for high‑bandwidth memory (HBM), a critical component for AI servers. India’s fast‑growing AI and data‑center...
Researchers Built a Switch 1,000 Times Faster than Today's AI Chips, and It Barely Generates Any Heat
Researchers at the University of Tokyo have created a magnetic spintronic switch that flips binary states in 40 picoseconds—about 1,000 times faster than today’s fastest AI accelerators. The device, built from a manganese‑tin antiferromagnet, consumes only a fraction of the energy and...
'This Is Borderline Mania': Wall Street Sees Bubble-Like Euphoria in AI-Fueled Semiconductor Rally
Wall Street’s AI‑driven semiconductor rally has lifted the Philadelphia Semiconductor Index about 70 % since late March, pushing the broader S&P 500 toward 7,500. Nvidia briefly topped a $5.5 trillion market cap while legacy players like Intel and Cisco joined the surge. Strategists...
Tata Electronics and ASML Partner on India’s First Semiconductor Fab
Tata Electronics and Dutch equipment maker ASML signed an agreement to build India’s first front‑end semiconductor fab in Gujarat. The $11 billion project will feature a 300‑millimetre wafer line and target chips for automotive, mobile and AI applications. The signing ceremony...