EU DARE Project Is Scrambling to Replace Codasip

Why It Matters

Replacing Codasip is critical to keep DARE’s high‑performance computing roadmap on schedule and to preserve European sovereignty over key chip designs. The episode underscores broader funding and talent gaps that could impede the continent’s semiconductor ambitions.

Key Takeaways

• Codasip pivots to cyber‑resilient SoCs, divests low‑end RISC‑V business.
• DARE’s €240 M ($260 M) budget faces partner replacement risk.
• EuroHPC seeks new European GPP partner to maintain roadmap.
• European investors’ cautious approach cited as hurdle for chip startups.
• Stakeholders stress need for faster public‑private funding mechanisms.

Pulse Analysis

The DARE consortium, a flagship of the EuroHPC Joint Undertaking, was designed to deliver a European‑sourced processor‑accelerator stack for data‑centre workloads. Codasip’s exit from the general‑purpose processor segment forces the project to reassess its hardware architecture, potentially delaying chip tape‑out and software co‑design milestones. Finding a replacement partner with comparable RISC‑V expertise is not trivial; the consortium must balance technical compatibility, IP licensing, and the strategic imperative of maintaining a sovereign supply chain.

Beyond the immediate technical scramble, Codasip’s divestment highlights a structural tension in Europe’s semiconductor ecosystem. Investors often demand near‑term cash flow, while chip development cycles span several years and require deep capital commitment. This mismatch can drive promising firms toward faster‑moving U.S. capital markets, as seen in Codasip’s sale to an American public company. Policymakers are therefore urged to streamline public‑private funding mechanisms, enabling quicker match‑funding and reducing the risk‑aversion that hampers long‑term R&D.

For the broader market, the DARE episode serves as a cautionary tale about the fragility of collaborative, publicly funded chip programs. Maintaining momentum will depend on EuroHPC’s ability to secure a new GPP partner, protect access to critical EDA tools like Codasip Studio, and reinforce a resilient investment environment. Success could cement Europe’s foothold in high‑performance computing and RISC‑V IP, while failure may accelerate reliance on non‑European silicon suppliers.