Keysight Adds GF Silicon Photonics Support to ADS

Why It Matters

By merging PIC design and system‑level simulation, engineers can cut validation cycles and lower redesign costs, accelerating time‑to‑market for high‑speed optical interconnects. The capability is especially critical as silicon photonics adoption expands in AI‑driven data centers.

Key Takeaways

• Keysight adds GlobalFoundries silicon photonics PDK to ADS Photonic Designer
• Enables electro‑optical‑electrical simulation of PICs within a single environment
• Supports TDECQ and eye‑diagram analysis before tapeout
• Accelerates system‑level verification for data‑center and AI optical links
• Reduces redesign risk by linking component models to GF process

Pulse Analysis

Silicon photonics is rapidly moving from research labs into production data‑center and AI infrastructure, driven by the need for bandwidth‑dense, low‑power interconnects. As the ecosystem matures, designers face a fragmented toolchain: one suite for photonic integrated circuit (PIC) layout, another for system‑level electro‑optical‑electrical (EOE) simulation. This split forces iterative data exchange, introduces model inconsistencies, and pushes critical link‑level validation to later stages, inflating time‑to‑market and engineering costs.

Keysight’s new GlobalFoundries CLO PDK for ADS Photonic Designer bridges that gap by embedding physics‑based models directly into the ADS environment. Engineers can now draft waveguide geometries, place active devices, and instantly simulate eye diagrams, transmission dispersion eye closure quaternary (TDECQ), and other signal‑integrity metrics without exporting netlists. The PDK’s alignment with GF’s silicon photonics process ensures that simulated performance correlates closely with fabricated silicon‑on‑insulator chips, enabling designers to predict real‑world link behavior early in the architecture phase. Coupled with FlexDCA oscilloscope software, the workflow supports direct comparison between simulated and measured data, further tightening verification loops.

The market impact is significant. Early‑stage system verification reduces costly redesigns, a key advantage as OEMs race to integrate co‑packaged optics and silicon photonic transceivers into next‑generation servers. Competitors that rely on separate PIC and system tools may see longer development cycles, giving Keysight and GlobalFoundries a strategic edge. As silicon photonics scales to meet the exploding demand for AI training workloads, integrated design‑simulation platforms will become a de‑facto requirement, shaping the future of high‑speed optical networking.