M31 Achieves Successful Tapeout of eUSB2V2 on TSMC N2P Process

Why It Matters

The tapeout validates a low‑power, high‑speed USB interface ready for 2nm‑scale chips, giving designers a proven building block that accelerates product development in power‑sensitive AI and edge markets.

Key Takeaways

• M31's eUSB2V2 IP tapeout on TSMC N2P 2nm node.
• Supports 1.2V/0.9V operation and up to 4.8 Gbps data rates.
• Targets ~50 mW power consumption, enhancing energy efficiency.
• Designed for AI, HPC, mobile, and edge computing workloads.
• Co‑optimized design reduces time‑to‑market for advanced‑node SoCs.

Pulse Analysis

The semiconductor industry is racing toward sub‑3nm processes, where every millimeter of silicon and milliwatt of power count. M31’s eUSB2V2 IP, now taped out on TSMC’s N2P platform, bridges the gap between legacy USB 2.0 ecosystems and the stringent demands of next‑generation SoCs. By maintaining full compatibility with existing USB devices while delivering 4.8 Gbps throughput, the IP lets chipmakers adopt cutting‑edge nodes without redesigning peripheral interfaces, preserving ecosystem continuity and reducing validation risk.

Technical differentiation stems from the IP’s low‑voltage operation at 1.2 V and 0.9 V, programmable transmit de‑emphasis, and adaptive receiver equalization such as CTLE and VGA. These features mitigate signal degradation that typically plagues high‑speed links in advanced nodes, allowing the design to stay within a 50 mW power envelope. For AI accelerators and HPC processors where bandwidth and energy efficiency are paramount, the eUSB2V2 offers a cost‑effective, standards‑based solution that can be integrated alongside custom high‑speed interconnects.

From a market perspective, the tapeout signals to silicon vendors that a turnkey USB 2.0 interface is ready for mass production at the 2nm class, shortening design cycles and improving time‑to‑revenue. M31’s close partnership with TSMC, including shared reference flows and layout guidelines, further de‑risks the migration to N2P. Looking ahead, the company’s roadmap to extend the IP across future TSMC nodes positions it as a strategic enabler for AI, edge, and intelligent device platforms that demand both performance and power frugality.