SEMI Summit Spotlights Europe’s Chiplet and Packaging Push

Why It Matters

Consolidating expertise on chiplets and advanced packaging helps Europe cut reliance on Asian fabs and capture a larger slice of the fast‑growing AI‑driven hardware market.

Key Takeaways

• Dresden summit runs June 17‑19, focusing on heterogeneous integration.
• Chiplet ecosystem highlighted as Europe’s strategic growth area.
• Hybrid bonding and wafer‑to‑wafer stacking featured for AI accelerators.
• Co‑packaged optics discussed to improve data bandwidth in HPC.
• Major players ASML, GlobalFoundries, NXP, STMicroelectronics attending.

Pulse Analysis

Europe’s semiconductor strategy is undergoing a decisive shift as AI workloads demand higher performance and lower latency. Traditional reliance on mature logic nodes is giving way to advanced packaging techniques that stack memory, compute and photonics in a single package. By fostering a home‑grown chiplet ecosystem, European firms can accelerate time‑to‑market while sidestepping export restrictions that have hampered access to Asian foundries. This approach also aligns with EU policy goals to secure supply chains and invest in next‑generation manufacturing capabilities.

At the Dresden summit, the focus will be on heterogeneous integration—combining disparate dies through hybrid bonding, die‑to‑wafer, and wafer‑to‑wafer processes. These methods enable denser interconnects and higher bandwidth, crucial for AI accelerators and high‑performance computing. Co‑packaged optics, another agenda item, promises to alleviate data‑movement bottlenecks by integrating photonic links directly with silicon chips. The presence of research powerhouses like imec and CEA‑Leti underscores the collaborative push between industry and academia to refine these technologies and translate them into scalable production lines.

The gathering serves as a catalyst for aligning roadmaps across the European value chain. With ASML, GlobalFoundries, NXP and STMicroelectronics presenting their latest innovations, the summit will likely shape investment priorities and standard‑setting for chiplet interfaces. Successful outcomes could translate into increased EU market share, new fab projects, and a stronger bargaining position in global semiconductor negotiations. Stakeholders watching the event should anticipate announcements that may redefine supply dynamics and accelerate Europe’s climb up the semiconductor value chain.