Can Hardware Reconfigure Itself in Real Time? NextSilicon’s Adaptive Compute

Why It Matters

If practical at scale, NextSilicon’s adaptive compute could cut the inefficiencies of general‑purpose CPUs/GPUs by tailoring hardware to live workload behavior, reducing software rewrites and improving performance and efficiency for AI and HPC tasks. This would shift the optimization burden from developers to hardware and runtime systems, changing how compute stacks are designed and deployed.

Summary

NextSilicon is building a novel, runtime-reconfigurable processor that adapts its silicon in real time to match the code it’s running, rather than forcing software to be rewritten for fixed CPUs or GPUs. The architecture is a data‑flow “sea of values” — arrays of ALUs with no traditional instruction-fetch/core overhead — and relies on telemetry to map and place hot segments of a program onto hardware dynamically. The company abandoned FPGA-based prototypes after finding vendor flows too slow and instead designed a custom chip that reconfigures at runtime to target the small fraction of code that dominates execution. CEO Allard Raz positions the approach as a practical alternative to heavyweight static compilation or asking customers to learn complex microarchitectures, with potential application to AI and high‑performance computing workloads.

Original Description

What if hardware adapted itself to your code instead of forcing developers to optimize for the hardware? In this episode of AI with Sally, Sally Ward-Foxton speaks with NextSilicon CEO Elad Raz about the company’s radically different approach to compute architecture: a runtime-reconfigurable processor designed to optimize itself while applications are running.