Intel's Upcoming 42-Core Nova Lake SKU Allegedly Upgraded to 44 Cores — New Config Frees up 6P+12E Tiles that Could Trickle Down as Locked bLLC Variants

Why It Matters

The re‑configuration expands Intel’s product stack with cache‑rich CPUs at more accessible price points, sharpening its battle against AMD’s high‑cache offerings. It also signals a strategic shift toward modular tile designs that can adapt to market demand and supply chain realities.

Key Takeaways

• Nova Lake‑S 44‑core SKU uses two 8P+12E tiles.
• Freed 6P+12E tiles may become cheaper locked bLLC variants.
• Non‑K Nova Lake CPUs could now include big LLC cache.
• Intel may launch "Core Ultra X" segment for 288 MB bLLC.
• Launch delayed to H2 2026 or 2027 amid component shortage.

Pulse Analysis

Intel’s Nova Lake‑S line introduces a modular compute‑tile design that lets the company mix and match performance (P) and efficiency (E) cores on a single die. The recent leak showing a 44‑core configuration—two identical 8P+12E tiles—demonstrates how Intel can repurpose a previously planned 6P+12E tile without sacrificing core count. By integrating 288 MB of on‑die big last‑level cache (bLLC), the chip aims to match AMD’s X3D stacking approach while keeping latency low. This architectural flexibility could accelerate Intel’s ability to fine‑tune performance envelopes across a broader product range.

The re‑allocation of the 6P+12E tiles opens the door for lower‑priced, non‑K Nova Lake variants that still carry bLLC, a feature previously limited to premium K‑series parts. If Intel markets these as locked CPUs, they could undercut AMD’s Zen 6 X3D offerings on price‑to‑performance metrics, especially for enthusiast builders seeking high cache without premium pricing. A dedicated "Core Ultra X" branding for the dual‑tile, 288 MB cache models would further differentiate the top tier, signaling a shift toward cache‑centric performance marketing that mirrors the industry’s move toward larger on‑die memory pools.

Despite the technical promise, Nova Lake’s launch has slipped into the second half of 2026 or even 2027, as Intel grapples with component shortages and geopolitical supply constraints. The delay gives competitors additional runway to refine their own high‑cache architectures, but it also allows Intel to refine yield and pricing strategies for the newly freed tile configurations. For enterprise and high‑end desktop buyers, the timing will influence upgrade cycles; a later release may align with the rollout of next‑gen graphics cards, creating a synchronized performance boost across the PC ecosystem.