Navitas Adds Top-Side-Cooled QDPAK and Low-Profile TO-247-4L to Package Line-Up in 5th-Generation GeneSiC Technology

Why It Matters

The packages address thermal and space constraints that limit power‑density growth in AI data‑centers and energy infrastructure, giving designers a path to higher efficiency in smaller form factors.

Key Takeaways

• QDPAK offers 2.3 mm height, 15×21 mm footprint
• Top‑side cooling cuts thermal resistance, boosts power density
• 5th‑gen TAP improves RDSon×Qgd by 35 %
• Low‑profile TO‑247‑4LP fits AI data‑center height limits
• Asymmetrical leads enhance manufacturing tolerances

Pulse Analysis

Navitas Semiconductor’s rollout of the top‑side‑cooled QDPAK and low‑profile TO‑247‑4LP marks a strategic push into the high‑density power market, where silicon‑carbide (SiC) devices are rapidly displacing silicon. The 5th‑generation GeneSiC platform leverages Trench‑Assisted Planar (TAP) technology, delivering a 35 % improvement in the RDSon×Qgd figure of merit and a 25 % boost in the Qgd/Qgs ratio. These gains translate into lower conduction losses and faster switching, essential for modern converters that must meet stringent efficiency targets while handling ever‑increasing power levels.

The QDPAK’s innovative top‑side cooling architecture directly channels heat to a heatsink, bypassing the limitations of traditional PCB‑based thermal paths. This design not only reduces thermal resistance but also enables a compact 15 mm × 21 mm footprint with a mere 2.3 mm profile, allowing manufacturers to shrink system dimensions without sacrificing current capability. By minimizing parasitic inductance, the package supports cleaner high‑frequency operation, making it attractive for electric‑vehicle chargers, renewable‑energy inverters, and industrial motor drives where space and efficiency are premium.

Conversely, the low‑profile TO‑247‑4LP addresses vertical clearance challenges prevalent in AI data‑center power supplies. Its reduced height and asymmetrical leads improve board‑level tolerances, facilitating higher power density in densely packed racks. As AI workloads drive exponential growth in power consumption, such form‑factor‑optimized SiC solutions become critical for maintaining performance while curbing cooling costs. Navitas’s dual‑package strategy therefore positions it to capture a growing share of the SiC market, where thermal management and footprint efficiency are decisive competitive factors.