"Can We Do Better?" Prof. Onur Mutlu's MICRO 2025 Keynote Talk at Seoul - 21.10.2025
Why It Matters
Memory‑centric designs can slash data‑movement energy and latency, directly lowering operating costs for AI, cloud, and genomics workloads.
Key Takeaways
- •Memory dominates energy and performance costs in modern computing systems.
- •Processor‑centric designs waste up to 90% of system energy on data movement.
- •Shifting to memory‑centric or processing‑in‑memory architectures can cut latency.
- •Paradigm change requires new hardware, software, and theoretical models.
- •Real‑world studies (Google, edge TPU) confirm memory bottleneck across workloads.
Summary
Prof. Onur Mutlu’s MICRO 2025 keynote, titled “Can We Do Better?”, framed the memory bottleneck as the central obstacle to energy‑efficient, high‑performance computing. He argued that while the industry has long treated computing as an energy problem, the majority of that energy is consumed by memory and data movement, a reality that is worsening with data‑intensive AI and genomics workloads.
Mutlu presented compelling data: Google’s 2015 data‑center analysis showed processors spend only 10‑20% of cycles on useful work, with the rest waiting for memory. Subsequent studies on edge‑TPU accelerators revealed over 90% of system energy is spent on memory accesses. He highlighted the stark energy disparity—memory accesses can cost thousands of times more than a single arithmetic operation—making the current processor‑centric paradigm unsustainable.
He invoked historical paradigm shifts, likening the move to memory‑centric computing to the Copernican revolution, and cited early research from the 1960s on near‑memory processing. The talk emphasized that achieving a true shift requires redesigning hardware interfaces, compilers, programming models, and even the theoretical foundations of computation to prioritize data movement alongside operation counts.
The implication for industry is clear: data‑center operators, AI developers, and hardware vendors must invest in processing‑in‑memory and autonomous memory accelerators to curb energy costs, improve latency, and sustain scaling. Companies that adopt memory‑centric architectures early will gain competitive advantages in performance, operational expenditure, and sustainability.
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