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VLIW: The “Impossible” Computer

The video chronicles the rise of Very Long Instruction Word (VLIW) architectures, a radical approach that promises computers up to twenty‑plus times faster without exotic silicon. By shifting the burden of parallelism from hardware to a sophisticated compiler, VLIW packs dozens of independent operations into a single, elongated instruction word, allowing ordinary clock speeds to achieve massive throughput. Central to VLIW’s promise is trace scheduling, a compiler technique that predicts the most likely execution path and reorders instructions across traditional block boundaries. This aggressive scheduling can yield 10‑30× speedups, far exceeding the modest 2‑3× gains historically assumed for instruction‑level parallelism. The trade‑off lies in added compensating code to handle mispredicted branches, a risk of code bloat that early skeptics highlighted. Josh Fisher’s 1970s research at NYU and later at Yale birthed the concept, culminating in the ELI‑512 paper and the Bulldog compiler. Colleagues like Bob Colwell initially dismissed the idea as “nuts,” fearing compiler‑induced overhead. Undeterred, Fisher co‑founded Multiflow in 1984, securing venture capital to build a VLIW prototype that demonstrated the claimed speedups, though the venture eventually faltered amid market pressures. The legacy of VLIW endures: modern superscalar and SIMD processors embed many of its principles, treating the compiler as a parallelism engine. By proving that software can orchestrate massive instruction concurrency, VLIW reshaped how architects balance hardware simplicity against performance, a lesson increasingly relevant as Moore’s Law slows.