
The subsidy underscores India’s strategic drive to become a self‑sufficient semiconductor hub, attracting foreign partners and reducing import reliance.
India’s recent subsidy for a $360 million chip assembly line marks a decisive step in its broader "Make in India" semiconductor agenda. Over the past few years, New Delhi has rolled out a series of incentives—tax breaks, capital subsidies, and land grants—to lure both domestic and foreign players into the high‑value back‑end segment. By lowering upfront costs, the government hopes to accelerate capacity building, close the domestic‑import gap, and position the country as a reliable node in the global supply chain, especially as geopolitical tensions reshape chip flows.
The partnership between Kaynes, a home‑grown electronics integrator, and Japanese heavyweights Mitsui & Co. and Aoi Electronics brings together local market insight and advanced manufacturing expertise. Mitsui contributes its global sourcing network and financing muscle, while Aoi supplies cutting‑edge packaging and testing technology. The $360 million investment is slated to become operational by the end of 2026, targeting advanced packaging formats that serve automotive, telecom and consumer electronics customers. This collaboration not only diversifies Kaynes’ product portfolio but also signals confidence in India’s policy stability and talent pool.
Strategically, the plant bolsters India’s bid to reduce reliance on imports from East Asian hubs and to capture a larger share of the $600 billion global semiconductor market. As the U.S. and EU tighten export controls, manufacturers are scouting alternative locations with supportive regimes, and India’s subsidy package makes it a compelling choice. The new facility will create skilled jobs, spur ancillary services, and potentially attract further foreign direct investment, accelerating the country’s transition from a design‑only destination to a full‑stack semiconductor ecosystem.
Comments
Want to join the conversation?
Loading comments...