CEA-Leti, CEA-List and PSMC Collaborate to Integrate RISC-V and MicroLED Silicon Photonics Into 3D Stacking and Interposer for Next-Generation AI

Why It Matters

The partnership directly addresses the bandwidth‑power bottleneck limiting AI chips, enabling faster, more efficient processors. It also expands PSMC’s service portfolio, giving customers access to open‑source RISC‑V IP and silicon‑photonic interconnects, accelerating time‑to‑market for AI solutions.

Key Takeaways

• RISC‑V IP combined with silicon photonics for AI chips
• MicroLED optical links replace copper, boosting bandwidth, reducing power
• PSMC adds 3D stacking, enabling dense, scalable compute modules
• Open Foundry model offers customized AI solutions to diverse customers
• Collaboration accelerates Europe’s leadership in next‑gen AI hardware

Pulse Analysis

The semiconductor industry is confronting a fundamental scaling wall: copper interconnects are approaching their physical limits, and power budgets for AI workloads are tightening. RISC‑V’s open‑source architecture offers designers the flexibility to tailor cores for specific workloads, while silicon‑photonic microLED links provide a low‑loss, high‑speed alternative for on‑chip data movement. Together, these technologies promise a paradigm shift from electrical to optical communication within chips, unlocking bandwidths previously unattainable in conventional stacks.

In the new collaboration, CEA‑List supplies customizable RISC‑V compute blocks, and CEA‑Leti contributes microLED‑based silicon‑photonic chiplets that can be co‑located on PSMC’s advanced 3D‑stacking and interposer infrastructure. By leveraging PSMC’s Open Foundry model, customers can request tailored process flows that integrate both compute and photonic layers, reducing design cycles and manufacturing risk. The combined solution delivers dense, high‑performance AI engines with markedly lower energy per operation, addressing the critical power‑efficiency demands of data‑center and edge AI deployments.

The market impact extends beyond technical gains. Europe’s AI hardware ecosystem gains a differentiated offering that rivals US and Asian foundries, potentially attracting AI startups and established OEMs seeking open, scalable platforms. As AI workloads continue to proliferate across automotive, IoT, and cloud domains, the ability to ship AI accelerators with integrated optical interconnects and open‑source cores could accelerate product rollouts and lower total cost of ownership. This collaboration thus not only solves immediate engineering challenges but also reshapes the competitive landscape for next‑generation AI silicon.