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Alice & Bob Introduce ‘Elevator Codes’ for Resource-Efficient Fault Tolerance

Alice & Bob unveiled “Elevator Codes,” a quantum error‑correction architecture that leverages the noise bias of cat qubits to dramatically cut hardware overhead while achieving a 10,000‑fold reduction in logical error rates. By nesting a 1D repetition code for phase‑flip protection with a high‑rate outer code for bit‑flip errors, the design moves a logical ancilla (“elevator”) through the chip to perform parity checks, avoiding the massive qubit count of 2D surface codes. The approach outperforms asymmetric codes like XZZX, delivering over 50 % lower qubit overhead for logical error rates of 10⁻¹² and enabling 100 high‑fidelity logical qubits with roughly 1,500 physical cat qubits, potentially accelerating the timeline for large‑scale quantum algorithms.