Intel Formally Announces Core Series 3 "Wildcat Lake"
Intel officially launched its Core Series 3 “Wildcat Lake” low‑end mobile processors, the first 18A chips positioned below the Core Ultra Series 3 “Panther Lake” SoCs. The lineup targets value‑oriented laptops, commercial devices and edge hardware, promising 47% higher single‑thread, up to 41% better multi‑thread performance, and 2.8× GPU AI gains versus the five‑year‑old Tiger Lake platform. The flagship Core 7 360 offers six cores, two Xe graphics cores and a 15 W base/35 W turbo power envelope, while the entry Core 3 304 provides five cores and a single Xe core. Intel also highlighted Linux kernel support for Wildcat Lake, aiming for broad OS compatibility.
Speculation: Silicon’s Most Expensive Compulsion
Modern high‑performance CPUs devote 30‑50% of die area and up to 30% of dynamic power to out‑of‑order speculative execution hardware that rarely benefits AI, scientific and EDA workloads. Simplex Micro’s Time‑Based Scheduling (TBS) removes most speculation structures from the vector...
The State of AI Compute
In Q1 2024 the world’s leading tech firms collectively owned about 2.5 million H100‑equivalent AI compute units. By the end of 2025 that figure surged to 21.3 million, an 8.5‑fold increase in just eight quarters. The growth reflects a structural shift, not merely...
Terafab Equipment and Chip Orders
Elon Musk announced equipment orders for Tesla's upcoming Terafab, designed to process 3,000 wafers a month—about 36,000 wafers or 3‑4 million chips annually. The capacity could expand to over 10 million chips per year by 2027, supporting Tesla vehicles, Cybercabs, Optimus robots,...
Anthropic Is Reportedly Testing Its Own AI Chips: No Product yet, but a Clear Signal in the Infrastructure Race
Anthropic is reportedly evaluating the development of its own AI accelerators, though no product or dedicated team has been confirmed. The move follows a surge in Claude’s demand, with projected 2026 revenue surpassing $30 billion, up from $9 billion in 2025. Anthropic...
AMD Ryzen AI 400, Aka “Gorgon Point”: Lots of New Model Names, but Based on Current Information, It Appears to...
AMD officially launched the Ryzen AI 400 series, codenamed “Gorgon Point,” in early 2026. The lineup re‑uses Zen 5/Zen 5c cores and RDNA 3.5 graphics from the earlier Strix Point and Krackan Point APUs, with modest clock‑speed and SKU tweaks rather than a new architecture. Desktop variants now...
TMTB: Nvidia's CEO Jensen on Dwarkesh Podcast - Key Quotes (NVDA)
Nvidia CEO Jensen Huang told the Dwarkesh podcast that the company’s 70% gross margin and fixed‑price strategy give it a pricing advantage over competing ASICs. He argued Nvidia’s performance‑to‑cost (TCO) ratio is unmatched, citing its token‑per‑watt efficiency and annual generational...
Rapidus: Will It Succeed Or Not?
Japanese foundry startup Rapidus secured a ¥631.5 billion ($3.97 billion) government subsidy, part of a broader $16 billion financing plan. The company has opened a chip‑characterization lab and a packaging/chiplet R&D line at its Chitose fab, aiming to ship 2nm gate‑all‑around (GAA) chips...
AGI Is Old News
Nvidia’s Blackwell architecture, announced in March 2024, only reached consumer‑ready models by late 2025, a roughly twenty‑month lag from keynote to usable intelligence. Early Blackwell‑powered models like Anthropic’s Claude Mythos have already sparked emergency meetings among central banks due to...
Tesla Finalizes AI5 Chip Design, Elon Musk Makes Bold Claim on Capability
Tesla announced that its AI5 chip has completed the tape‑out stage, clearing the final hurdle before mass production. Elon Musk clarified that the existing AI4 hardware already delivers safety performance superior to human drivers for Full Self‑Driving, so AI5 will...
NVIDIA’s Next Flagship Project? A Leak Suggests the RTX TITAN Blackwell or RTX 5090 Ti Could Launch in the Third...
A leak reported by Overclocking.com and echoed by several outlets suggests NVIDIA is developing a new high‑end Blackwell GPU, tentatively called the GeForce RTX 5090 Ti or RTX Titan Blackwell, slated for a Q3 2026 launch. The rumored card would sit above the current...
AMD Makes a Big Splash with the MI355X in MLPerf Inference 6.0: Over One Million Tokens per Second in Multi-Node...
AMD announced that its Instinct MI355X GPU achieved over one million tokens per second in multi‑node inference, topping the new MLPerf Inference 6.0 suite. The benchmark showed 1,042,110 tokens/s on Llama 2 70B and 1,031,070 tokens/s on GPT‑OSS‑120B across 11‑12 nodes, with 92‑93% scaling efficiency. MLPerf 6.0 introduces...
Intel Officially Lists the Core Ultra X9 378H in ARK: Panther Lake Gets Another X9 SKU
Intel has officially added the Core Ultra X9 378H to its ARK database, confirming a new Panther Lake mobile SKU. The processor packs 16 cores—four performance, eight efficient, and four low‑power cores—alongside an 18 MB cache, up to 5.0 GHz turbo, and a 25 W base...
AMD Expands Ryzen AI Embedded P100: More Zen 5 Cores, Up to 80 TOPS, and ROCm for Edge AI
AMD announced an expanded Ryzen AI Embedded P100 line featuring eight to twelve Zen 5 cores, RDNA 3.5 graphics, an XDNA 2 NPU and up to 80 system TOPS. The new chips claim up to 39% higher multithreaded performance and up to 2.1‑times the TOPS...
LimeSDR Micro M.2 2280 SDR Card Pairs NXP LA9310 Baseband Processor with LMS7002M RF Transceiver (Crowdfunding)
Lime Microsystems unveiled the LimeSDR Micro M.2 2280, a compact software‑defined radio that pairs NXP’s ultra‑low‑power LA9310 baseband processor with the LMS7002M RF transceiver. The module fits a PCIe Gen3 x1 M.2 socket, offers a 30 MHz‑3.8 GHz frequency span, up to 100 MHz bandwidth, and...
Aixtron Raises 2026 Opto Revenue (Again)
Aixtron announced a preliminary 2026 full‑year revenue uplift, with virtually all the upside coming from its optoelectronic (opto) equipment division. The revision, posted in a brief earnings release, signals stronger demand for MOCVD tools used in LEDs, lasers and emerging...
Aeluma Wins $4M Contracts for Quantum Materials
Aeluma announced it has secured more than $4 million in U.S. government contracts to scale production of quantum‑dot lasers and AlGaAs nonlinear materials. The funding enables a dual‑sourcing strategy with Tower Semiconductor and Sumitomo Chemical Advanced Technology, moving the company from...
A $750M Fabless Chip Company, and the Foundry That Makes the Chips
Credo Technology announced a $750 million cash acquisition of Israeli silicon‑photonic fabless startup DustPhotonics, with an earn‑out that could lift total consideration to about $1.3 billion. DustPhotonics’ proprietary L3C (Low‑Loss Laser Coupling) technology remains opaque, as no public loss figures or peer‑reviewed...
Need Some CPUs? Good Luck With That
The AI boom has moved from GPUs to a surge in CPU demand, leaving cloud providers and PC makers scrambling for capacity. Microsoft’s GitHub and AWS report severe shortages as AI reasoning models require intensive CPU cycles for validation, reinforcement...
Brookhaven Lab: A Silicon-Compatible Path Toward Scalable Quantum Systems
Brookhaven National Laboratory researchers have fabricated superconducting quantum interference devices (SQUIDs) using transition‑metal silicide layers on silicon substrates. The process adapts standard CMOS lithography and etching techniques, enabling the creation of constriction‑type junctions instead of conventional Josephson junctions. Operating the...
Accenture Federal Services to Deliver Early Operating Capability for DOE’s Genesis Mission CM2US
Accenture Federal Services is spearheading a high‑velocity engineering sprint to deliver an early operating capability for the Department of Energy’s Genesis Mission CM2US initiative. Working with all DOE national labs and Databricks Federal, the team will launch an AI‑ready digital...
Hardening the Silicon: Why Analog Anti-Tamper IP Is the New Security Baseline
Analog anti‑tamper IP is emerging as a baseline for hardware security as billions of IoT and automotive SoCs face increasingly sophisticated physical attacks. Hackers now employ fault injection, glitching, side‑channel, and micro‑probing techniques that can bypass software‑only protections and compromise...
Bull and Equal1 Partner to Accelerate Hybrid Quantum-HPC Integration in Europe
Bull, a European HPC and AI leader, and Dublin‑based Equal1 have signed a Memorandum of Understanding to fuse Bull’s Qaptiva supercomputing platform with Equal1’s silicon‑spin quantum servers. The collaboration will create a high‑speed connector that lets classical supercomputers run quantum‑accelerated...
Renesas Scalable Automotive SoC Design Using Arteris NoC
Renesas has integrated Arteris FlexNoC interconnect IP into its next‑generation Gen‑5 R‑Car automotive SoCs. The NoC fabric links Arm CPU clusters, GPUs and neural‑processing accelerators, delivering scalable bandwidth and deterministic QoS for advanced ADAS and autonomous‑driving workloads. Power consumption drops...
Credo + DustPhotonics: Rewiring the Optical Layer of AI Infrastructure
Credo announced a $750 million acquisition of DustPhotonics, a fabless silicon‑photonic chip maker, to broaden its optical interconnect portfolio. The deal reflects a broader industry pivot from raw compute power to interconnect bandwidth as AI models scale to trillions of parameters....
SNIA Launches MRAM Alliance SIG to Support Expanding Use of MRAM
SNIA announced the formation of a Magnetoresistive Random Access Memory (MRAM) Alliance Special Interest Group, inviting foundries, chip makers, memory manufacturers, equipment suppliers, and system companies to collaborate. The SIG will focus on aligning the semiconductor ecosystem, developing standards, and...
Intel Serpent Lake with an NVIDIA RTX Tile and “Copper Shark”? A Leak Meets an Already Confirmed Intel-NVIDIA Alliance
A recent leak suggests Intel’s upcoming "Serpent Lake" SoC could embed an NVIDIA RTX GPU tile, while a new P‑core codename "Copper Shark" has surfaced. The rumor aligns with the Intel‑NVIDIA collaboration announced in September 2025 to develop x86 SoCs with...
NVIDIA Is Reportedly Shifting Its GeForce Lineup to the RTX 5060 and 8GB Models in 2026 – the Leak Comes...
NVIDIA is reportedly refocusing its 2026 GeForce roadmap on the RTX 5060, RTX 5060 Ti 8 GB, and RTX 5070, emphasizing smaller 8‑GB memory configurations. The shift aligns with a tight global DRAM market and rising AI‑driven memory demand that have pushed VRAM costs higher. Internal...
GreenBoost Memory Orchestrator For NVIDIA GPUs Introduces GreenBoost-Proton For Gaming
GreenBoost, an open‑source memory‑tiering solution for NVIDIA GPUs, now offers GreenBoost‑Proton, a Vulkan‑based layer that expands reported VRAM for Linux gaming. After legal pressure forced the original “nvidia_greenboost” repository offline, the developer relaunched the code on GitLab without NVIDIA branding....
Supermicro Introduces Compact, Energy-Efficient Systems to Accelerate Adoption of Intelligent Edge AI
Supermicro unveiled a new family of edge‑optimized servers built on AMD’s EPYC 4005 Zen 5 processors. The lineup includes a mini‑1U box, a short‑depth 1U rackmount, and a slim tower, each delivering up to 16 cores, DDR5 memory, PCIe Gen 5 and optional...
NoC Matters: Designing the Backbone of Next-Gen AI SoCs
The article argues that network‑on‑chip (NoC) design has become the cornerstone of modern AI‑centric System‑on‑Chips, dictating performance, power efficiency, and scalability. As heterogeneous accelerators proliferate, data movement dominates system behavior, making NoC topology, buffering, and QoS policies critical. Designers must...
NVIDIA Hiring More LLVM Engineers To Work On CUDA Tile
NVIDIA announced it is hiring additional LLVM compiler engineers to advance its CUDA Tile programming model. CUDA Tile, unveiled last year, provides a virtual ISA for tile‑based parallelism and ships an open‑sourced intermediate representation built on LLVM's MLIR. The new...
From Wooden Boards to White Gloves: How FPGA Prototyping and Emulation Became Two Worlds of Verification… and How the Convergence...
FPGA prototyping and hardware emulation originated from parallel needs—speed and system realism versus deep debugging of ever‑larger designs. Prototyping leverages re‑programmable silicon to run software workloads early, while emulation provides controlled, observable execution for complex verification. Historically served distinct vendor...
Week 15, 2026
Week 15 highlights a surge in semiconductor capital spending and market size, with equipment billings climbing to $135.1 billion as AI compute and advanced packaging drive demand. Gartner projects the industry to reach $1.32 trillion in 2026, underscoring the monetary impact of...
Intel Brings Fab 34 Back: The Repurchase of the Apollo Stake Marks a Change of Course in Ireland
Intel announced on April 1, 2026 that it will repurchase Apollo’s 49 percent stake in its Fab 34 joint venture in Leixlip, Ireland, for an estimated $14.2 billion. The transaction will be funded with existing cash and roughly $6.5 billion of new debt. Fab 34, a high‑volume...
Japan’s Semiconductor Push Is Getting More Expensive: Rapidus Receives an Additional 631.5 Billion Yen for Its 2-Nm Roadmap
Japan announced an additional ¥631.5 bn ($3.96 bn) for Rapidus to accelerate its 2‑nm logic chip roadmap. The infusion lifts total government R&D backing to ¥2.354 tn (about $14.8 bn) as the company readies a pilot line in Chitose and verifies 2‑nm GAA transistors...
QD Laser Inc. (6613): Peak Market Cap ¥64.6B, Revenue ¥1.3B, 49 Employees. What It Takes for These Numbers to Make...
QD Laser Inc., a veteran quantum‑dot laser producer, saw its market capitalization surge to roughly ¥64.6 billion (about $430 million) in March 2026 before retreating amid extreme volatility. Despite the lofty valuation, the firm generated only ¥1.3 billion ($8.7 million) in annual revenue and...
Samsung and AMD Strengthen Memory Partnership: HBM4 for MI455X and DDR5 for EPYC Venice Are Officially Confirmed
Samsung and AMD have formalized a three‑pronged memory partnership that includes Samsung's next‑gen HBM4 for the upcoming Instinct MI455X accelerator, DDR5 for AMD's sixth‑generation EPYC "Venice" CPUs, and exploratory foundry services for future AMD silicon. Samsung’s HBM4 will use a 1‑c...
MediaTek Dimensity 9600 Pro Leaked: New CPU Cluster, LPDDR6, and UFS 5.0 Point to a Noticeably More Aggressive Flagship SoC
MediaTek’s rumored Dimensity 9600 Pro chipset features a 2‑3‑3 octa‑core layout with two high‑performance “Canyon” cores and a clock speed approaching 5 GHz. The leak also claims support for next‑generation LPDDR6 memory and UFS 5.0 storage, marking a generational jump from the Dimensity 9500’s LPDDR5X...
Nio's William Li Urges Battery and Chip Standardization to Curb EV Supply Chain Waste
Nio founder William Li called for industry‑wide standardization of battery cells and semiconductor components at the China EV100 forum, estimating potential cost savings of over ¥100 billion (≈$14.6 billion). He warned that rapid model turnover has created supply‑demand mismatches, leading to hundreds of millions...
RISC-V BeagleV Ahead Single Board Computer To See Working HDMI With Linux 7.1
The BeagleV Ahead, an open‑source RISC‑V single‑board computer built around the quad‑core TH1520 SoC, now supports HDMI output in the Linux 7.1 mainline kernel. The kernel’s Device Tree updates add the HDMI connector node and activate the DPU, enabling video‑out for...
Intel Arc Pro B70 in Its First Teardown: Early Disassembly Reveals How Intel Has Packaged Big Battlemage for Workstation Use
Intel’s Arc Pro B70 has been dissected in its first public teardown, revealing a purpose‑built workstation design rather than a repurposed gaming card. The reference model uses a blower‑style cooler with a large vapor‑chamber heatsink, directing airflow out the rear for optimal...
Snap Is Partnering with Qualcomm for Its New Smart Glasses – Bringing AI Glasses One Step Closer to Reality
Snap has sealed a multi‑year strategic partnership between its Specs Inc. subsidiary and Qualcomm Technologies, committing future smart‑glasses to the Snapdragon XR platform. The first generation of Specs, a standalone AR wearable, is slated for launch in late 2026 and...
TSMC Grows More Than Expected in the First Quarter of 2026 – AI Demand Keeps the Company on Track Despite...
TSMC reported first‑quarter 2026 revenue of NT$1.1341 trillion (≈ $35 billion), a 35.1% year‑over‑year increase and well above the LSEG SmartEstimate of NT$1.125 trillion. March alone generated NT$415.19 billion (≈ $13 billion), up 30.7% from February, underscoring a rapid sales acceleration. Reuters attributes the surge to sustained...
Support For AMD GFX11.7 "RDNA 4m" Pending For RADV & RadeonSI Drivers
AMD’s upcoming RDNA 4m graphics IP, labeled GFX 11.7 (GFX1170), has moved from LLVM shader compiler patches to open‑source driver support. Six Mesa patches—adding roughly 3,000 lines of code—are under review to enable the RADV Vulkan and RadeonSI OpenGL drivers. The changes...
ASE To Build $3B IC Test Facility
Taiwan's Advanced Semiconductor Engineering (ASE) broke ground on a new IC test facility in Kaohsiung, investing NT$108.3 billion (about US$3.41 billion). The plant, part of a broader high‑tech testing cluster with WinWay Technology and Horng Terng Automation, will begin operations in April 2027....
BrainChip Unveils Radar Reference Platform to Bridge the ‘Identification Gap’ in Edge AI
BrainChip Holdings launched a Radar Reference Platform that couples a FMCW radar module with its Akida neuromorphic processor to deliver real‑time object classification at the edge. The solution adds a deep‑learning layer that extracts micro‑Doppler signatures, allowing it to differentiate...
Computer Architecture’s AlphaZero Moment Is Here
The paper argues that computer architecture has shifted from idea scarcity to evaluation scarcity, driven by large‑language models and autonomous pipelines. The open‑source Gauntlet system reproduced authors' solutions in 48 % of 85 recent ISCA/HPCA papers and proposed alternatives in another...
Amazon’s Andy Jassy Says the Company May Sell Trainium Chips to Outside Customers, Putting the Business at $50B in Annual...
Amazon CEO Andy Jassy announced the company may begin selling its proprietary Trainium AI chips to external customers. A full market rollout could lift the chip business from a $20 billion run rate to roughly $50 billion annually. Trainium, alongside Graviton and...
Google Cloud and Intel Expand Their Multiyear Partnership to Co-Develop Custom Chips for AI Infrastructure
Google Cloud and Intel have deepened their multiyear alliance, extending the use of Intel’s Xeon 6 processors for AI, cloud and inference workloads while expanding joint development of custom ASIC‑based infrastructure processing units (IPUs). The IPU effort, launched in 2021, targets...