Today's Semiconductors Pulse
Intel and Nvidia to launch integrated CPU‑GPU SoCs in early 2028
Intel and Nvidia have confirmed a joint effort to produce x86 system‑on‑chips that combine Intel CPU cores with Nvidia RTX GPU chiplets. The first products are slated for early 2028, potentially unveiled at CES. They will be fabricated on TSMC’s N3P process, feature LPDDR6 memory and use Nvidia’s upcoming Rubin architecture.
TSMC Is Upgrading Japan’s Second Plant to the 3-Nanometer Process. Kumamoto Is Transitioning From a Backup Site to a True...
Taiwan Semiconductor Manufacturing Co. (TSMC) has received approval to launch 3‑nanometer production at its second Japanese fab in Kumamoto, with equipment installation slated for 2026 and volume output expected in 2028. The plant will initially run at a capacity of 15,000 twelve‑inch wafers per month, marking a shift from its original 6‑ to 12‑nm roadmap. The upgrade transforms the site from a backup manufacturing hub into a high‑end node facility, reflecting growing AI‑driven chip demand. Reported investment for the second plant is roughly $17 billion, though TSMC has not confirmed the figure.
SiFive Raises $400 Million; Nvidia Bets on RISC-V for Data Centers
SiFive announced a $400 million Series G financing round that values the RISC‑V IP company at $3.65 billion. Nvidia participated as an investor, reinforcing a joint plan to deliver high‑performance RISC‑V CPUs with NVLink Fusion connectivity for data‑center AI workloads. The capital will...
Scientists Develop Three-in-One Diode
Researchers at the University of Science and Technology of China have unveiled a GaN‑based PN junction photodiode that simultaneously handles photosensing, memory storage, and processing. By inserting an n‑AlGaN charge‑storage layer, the device can switch among three functional modes using...
Marktech Launches High Power 280nm UVC LEDs
Marktech Optoelectronics has introduced a family of high‑power 280 nm UVC LEDs available in single‑, two‑ and four‑chip formats. The devices deliver wall‑plug efficiencies up to 7% and are rated for more than 15,000 hours at the L70 degradation point. By...
Riber Delivers Strong Earnings Growth in 2025
Riber posted 2025 full‑year results showing a modest 2% dip in revenue to €40.3 million (about $44 million) but a 27% jump in net income to €5.2 million ($5.7 million). The company’s operating margin improved to 13% of sales, aided by a favorable product...
Japanese Team Achieves 2 Μm-Band PCSEL Laser Oscillation
Asahi Kasei Microdevices (AKM) and Kyoto University have demonstrated laser oscillation in a 2 μm-band photonic crystal surface‑emitting laser (PCSEL). The breakthrough showcases PCSEL’s ability to deliver high directionality and ultra‑narrow linewidth in a compact infrared source. By operating at 2 μm,...
QuinAs Links Memory Device Physics to AI Performance
QuInAs Technology has published research linking its ULTRARAM compound‑semiconductor memory device directly to AI system performance. The paper introduces a physics‑based compact modelling framework that captures resonant tunnelling and floating‑gate dynamics, enabling hardware‑aware benchmarking of ULTRARAM as a synaptic element...
CEA-Leti, CEA-List and PSMC Collaborate
CEA‑List, CEA‑Leti and PSMC announced a collaboration to merge RISC‑V processor IP with silicon‑photonic interconnects on PSMC’s 3D‑stacking platform, targeting next‑generation AI systems. The joint effort will embed customizable RISC‑V compute blocks and microLED‑based optical links into high‑bandwidth chiplet architectures,...
AI Compute Boom Propels Foundry 2.0 Market to $360 Billion
The AI‑driven compute boom is pushing the Foundry 2.0 market toward a $360 billion valuation in 2026, with advanced nodes and CoWoS packaging remaining scarce. TSMC raised its 3 nm capacity target to 165,000 wafers per month and aims for a 44% market...
Gartner Forecasts Worldwide Semiconductor Revenue to Exceed $1.3 Trillion in 2026
Gartner projects worldwide semiconductor revenue to exceed $1.3 trillion in 2026, reflecting a 64 % year‑over‑year increase. Memory revenue is expected to triple as DRAM and NAND flash prices surge 125 % and 234 % respectively, a phenomenon Gartner dubs “memflation.” AI semiconductors will...
Big Tech Will Soon Design Its Own Chips
File this under Pat’s Law Of Always: Every large tech company will consider designing its own chips.
Anthropic Builds Custom AI Chips to Ease Shortage
JUST IN: Anthropic is developing its own AI chips to combat the escalating shortage fueling their advanced systems.
Samsung’s Profit Surges On AI-Related Gains, Japan Moves to the Industrial Deployment of AI
Samsung projected a first‑quarter operating profit of about $38.7 billion, driven by soaring demand for AI‑optimized DRAM and HBM memory. South Korean chip makers, led by SK Hynix’s 60% HBM share, saw stock gains as memory prices are forecast to jump 58‑63%...
Panmnesia Wins Government Project to Develop AI Accelerator Link Controller
Panmnesia announced on April 8 that it secured a South Korean government‑backed project to develop AI accelerator link controllers and switches using open‑standard interconnects. The initiative, part of the K‑Cloud AI semiconductor program, focuses on UALink and Ethernet technologies, with silicon...
AWS's Trainium Powers Anthropic, Sparks Amazon Gemini Moment
$AMZN is about to have its $GOOG Gemini moment. AWS CEO : “All Anthropic models out today were trained on Trainium.” Anthropic Mythos was most likely trained on Trainium. Trainium chips are sold out
A New Memory Chip Survives 700°C and Could Enable AI in Space
Researchers at the University of Southern California have demonstrated a memristor memory chip that functions at 700 °C (1,300 °F) without degradation. The device uses a tungsten electrode, hafnium‑oxide insulator and a graphene interlayer that blocks tungsten filament formation. It retains data...
Compute Domains & Multi-Node NVLink in Kubernetes: Scaling GPU Workloads
NVIDIA’s ComputeDomains add a Kubernetes‑native layer that dynamically creates and tears down multi‑node NVLink communication groups for GPU workloads. By extending the Dynamic Resource Allocation driver, the feature makes cross‑node bandwidth a schedulable resource rather than a static configuration. This...
Photovoltaic Driver Streamlines EV Power Designs
Vishay introduced the VODA1275, a photovoltaic MOSFET driver designed for high‑voltage automotive applications. It offers a 20 V open‑circuit output, 20 µA short‑circuit current, and an 80 µs turn‑on time—about three times faster than rival parts. The AEC‑Q102‑qualified device targets EV pre‑charge circuits,...
RISC-V SoC Supports Voice-Enabled IoT Devices
Espressif Systems began sampling its new ESP32‑S31, a dual‑core RISC‑V SoC that bundles Wi‑Fi 6, Bluetooth 5.4, Thread, Zigbee and Ethernet. Running at 320 MHz, the chip delivers 6.86 CoreMark/MHz, a 128‑bit SIMD path, 512 KB SRAM and up to 8‑bit DDR PSRAM for edge...
Coherent Advances Silicon Carbide Thick Epitaxy Capabilities for High-Voltage AI Datacenter and Industrial Power Applications Up to 10kV
Coherent Corp announced new thick silicon‑carbide (SiC) epitaxy platforms on 150 mm and 200 mm wafers that support power devices up to 10 kV, with demonstrated capability beyond that threshold. The technology targets high‑efficiency, high‑power‑density converters for AI‑intensive datacenters and industrial electrification such...
SiFive Announces $400M Series G Round
SiFive announced a $400 million Series G financing that lifts its valuation to $3.65 billion. The round was led by Atreides Management and attracted marquee backers such as NVIDIA, Apollo Global Management, Point72 Turion and T. Rowe Price. SiFive says the capital will speed development...
Infineon Talks Powering AI and Infrastructure
Infineon highlighted its strategy to power AI across the electrical grid and data‑center cores, emphasizing power electronics as a critical enabler for automotive, industrial and consumer applications. The company showcased its silicon‑carbide (SiC) and gallium‑nitride (GaN) product portfolio, along with...
At APEC 2026, AOS Showcases Its Expanding Portfolio with Advanced Controllers, Power Stages, and Protection Solutions
At APEC 2026, AOS unveiled a suite of new power‑management ICs aimed at AI‑centric workloads. The lineup includes the 16‑phase AOZ73216QI GPU controller, Intel‑compatible CPU controllers supporting up to nine phases, and compact Smart Power Stages for high‑performance compute. AOS...
Hypertec Becomes Key Partner for Nvidia in Canada
Hypertec Group’s Ciara division has been named Nvidia’s first original equipment manufacturer (OEM) partner in Canada, granting the Montreal‑based firm early access to GPU silicon, engineering support, and joint marketing. The partnership elevates Hypertec’s visibility and credibility, allowing it to...
CRDO As An AI Play
Credo Technology Group (CRDO) is shifting from a niche SerDes and active cable supplier to a full‑stack AI connectivity fabric architect. The company aims to close the reliability gap in massive GPU clusters by delivering vertically integrated interconnect solutions that...
Group‐III Nitride‐Based Wide‐Spectrum Multifunctional Synapses for Encrypted Light Communication and Image Recognition
Researchers have engineered InGaN core‑shell nanorod synapses that combine wide‑spectrum photodetection with stable photo‑electric memory. The devices achieve a peak responsivity of 31.47 A/W and sub‑250 µs response times under 810 nm illumination, while delivering tunable synaptic plasticity at 365 nm UV light. By...
WEKA Claims Nvidia CMX Support Plays to Its Strengths
Nvidia’s GTC 2026 announcement introduced the CMX KV‑cache extension for RDMA‑connected SSDs, prompting industry speculation that it could erode WEKA’s advantage with local SSDs in GPU servers. WEKA counters that its NeuralMesh client and server software already supports Nvidia Grace...
YieldHUB Expands Its Impact with New Technology and a New Website
YieldHUB has launched a redesigned website and introduced YieldHUB Live, a real‑time manufacturing intelligence layer for semiconductor test floors. The new portal groups solutions by product lifecycle, device architecture and user role, while the live platform delivers continuous visibility, anomaly...
Siemens Accelerates AI Chip Verification to Trillion‑cycle Scale with NVIDIA Technology
Siemens and NVIDIA announced that Siemens’ Veloce proFPGA CS hardware‑assisted verification platform can capture tens of trillions of pre‑silicon design cycles in just a few days. The breakthrough combines Siemens’ scalable FPGA‑based architecture with NVIDIA’s performance‑optimized chip designs, dramatically accelerating AI/ML system‑on‑chip...
Intel: In-House Fabrication and Market Challenges
Intel continues to manufacture its chips in‑house, a rare model among major semiconductor firms, while facing mounting competition from fabless rivals like TSMC, AMD, and Samsung. The loss of Apple as a customer in 2020 and a delayed Ohio megafab,...
Even Nvidia’s Own Research Teams Can’t Get Enough GPUs Amid the Race for AI Computing Power
Nvidia’s own research groups are scrambling for GPUs, highlighting a sector‑wide shortage of the $30,000‑plus chips that power AI model training. At the HumanX conference, applied‑deep‑learning lead Bryan Catanzaro confirmed that even internal teams must fight for compute allocations. The scarcity...
Nvidia N1 Engineering Sample Motherboard Leak Shows 128GB LPDDR5X Configuration
Nvidia’s upcoming N1 ARM‑based processor was spotted on a Chinese marketplace as an engineering‑sample motherboard, indicating early validation of the chip for thin‑and‑light devices. The board packs eight LPDDR5X modules for a total of 128 GB memory running at 8533 MT/s, and...
Intel's EMIB-T Packaging Technology Set for Fab Rollout This Year — as TSMC CoWoS Capacity Remains Limited,EMIB-T Is Preparing for...
Intel announced that its next‑generation EMIB‑T advanced‑packaging technology will enter fab production this year, positioning the company to capture AI‑accelerator demand as TSMC’s CoWoS‑L capacity stays oversubscribed. EMIB‑T adds through‑silicon vias to the existing embedded bridge, enabling HBM4‑class power delivery...
NXP Expands Arteris NoC Deployment to Scale Edge AI Architectures
NXP announced an expanded deployment of Arteris’s NoC and cache‑coherent IP suite—including FlexNoC®, Ncore®, CodaCache® and the Magillem® integration platform—across its upcoming edge‑AI silicon. The move targets the growing need for deterministic latency, high bandwidth, and safety‑critical isolation in heterogeneous...
Taming Skyrmions: Atom-Thin Magnets Point to Ultra-Dense, Low-Power Memory
Researchers at Argonne National Laboratory used cryogenic Lorentz transmission electron microscopy to directly image magnetic domains and skyrmion evolution in atom‑thin Fe₃GeTe₂ (FGT). The study shows that sample thickness and applied magnetic field precisely control skyrmion size, density, and reversal...
Rising Memory Costs Threaten AI ROI and Market Confidence
While we talk about memory prices 📈, and while that is true (great for memory names), I am worried about what this does to capex costs and in return on AI $$. If the cost to serve AI goes...
Nvidia Invests In CPU Chip Startup SiFive
Nvidia disclosed a strategic stake in SiFive, the RISC‑V processor startup, as part of a $400 million oversubscribed financing round that values SiFive at $3.65 billion. The new capital will accelerate SiFive’s development of custom RISC‑V CPUs and AI IP aimed at...
Tenstorrent Launches $9,999 AI Workstation with 384 GB RAM
New Tenstorrent AI workstations are expected to cost US $9,999, with 384 GB of memory, designed to run cutting-edge AI models at your desk. @Nvidia has released its own AI workstation with 748 GB. https://spectrum.ieee.org/ai-workstation-looks-like-pcs
Mythos Launches Blackwell AI, GPUs Promise 2‑3×
Get ready for the acceleration 🚀 Mythos is JUST the first Blackwell class AI Vera Rubin GPUs land in months → 2-3x better models by December. Feynman in 2028 → another 2-3x leap. Mythos 10T → 100T–500T+ class by end-2028
SiFive Raises $400M To Double Down On High Performance RISC-V For Data Centers
SiFive announced a $400 million Series G financing round to accelerate its high‑performance RISC‑V offerings for data‑center workloads. The round was oversubscribed, with lead investors including NVIDIA and Apollo Global Management. Proceeds will fund new CPU core designs, accelerators, and system IP,...
Google Partners with Intel for SmartNIC‑powered Datacenters
Google wants more Intel inside ... its datacenters, taps Chipzilla for more SmartNICs https://t.co/NWjnTCSr9z https://t.co/IGYOky9NxI
AI Compute Shortage Far Worse Than Expected
I was not emphatic enough about just how short we are of compute, memory, energy, etc. The demand curve for AI has been greatly understated. And the estimates aren’t bullish enough. Watch. 👀 We do not have even close to enough to...
World Briefs | Intel and Google Focus on AI CPUs in Expanded Partnership
Intel and Google have broadened their alliance, with Google committing to deploy Intel’s latest Xeon 6 processors for AI inference and general‑purpose workloads. In Brazil, the government plans to appeal a court decision that halted a newly imposed 12% oil export...
Amazon Graviton Surges; CPU Bottleneck Drives ARM AGI Push
$AMZN Graviton is soaring. As we've said, the CPU is the next great bottleneck. $ARM is on to something its AGI CPU.
Nvidia N
Alleged images of the long-awaited Nvidia N1/N1X SoC surface on laptop motherboard — board features 128 GB of LPDDR5X memory alongside 8+6+2 phase VRM https://t.co/fFeae7JJ8r
RISC-V Optimized Strnlen Implementation For Linux 7.1 Yields Big Speed-Up
A hand‑optimized RISC‑V implementation of the kernel’s strnlen() function is slated for Linux 7.1. Developed by Feng Jiang of KylinOS, the assembly version includes a generic path and a Zbb‑enabled variant, delivering up to a 427.5% speed increase in benchmarks. The...
Accelerator Mismatch Turns Datacenters Into
Historically this doesn’t work In chips we call it dead silicon Predicting dead datacenter Ratioing accelerators to the main computer is fragile Models change, size changes and you have a brick Possibly $$$
Liquid Cooling Unlocks AI-Scale Compute Capacity
Part 2 of the future of the datacenter series. 800 vDC + liquid cooling becomes a co-design situation with compute infra decisions. The key is the compute capacity it unlocks. Liquid Cooling: The Thermal Prerequisite for AI Infrastructure...
CPU Designs Race Ahead, yet Trail AI Breakthroughs
Processor architectures are evolving faster than ever, but they still lag the pace of AI development https://t.co/KPtUjyF6PQ #processors #CPU @Arm #AgenticAI @Synopsys @unisouthampton @arteris_noc @quadric_io #NPU @Keysight @Cadence @AlphaDesignAI https://t.co/3Nu81L1qgc
Eliminate Davis‑Bacon to Unblock the CHIPS Act
Great detailed piece on how Davis-Bacon was a problem for the CHIPS Act, as some of us predicted it would be. But the obvious answer is to get rid of Davis-Bacon entirely, which is not the recommendation for some reason....