PCIe 8.0 Spec Draft 0.5 Released For 1TB/S Bi-Directional X16 Bandwidth
The PCI‑SIG released draft version 0.5 of the PCIe 8.0 specification, which doubles the x16 bi‑directional bandwidth to 1 TB/s (256 GT/s). PCIe 8.0 retains PAM4 signaling and aims for backward compatibility while exploring new connector designs. The draft also introduces power‑reduction techniques. This follows PCIe 7.0’s 512 GB/s capability.
Canadian Government To Spin-Off III-V Foundry Unit
The Canadian government is preparing to spin off the Canadian Photonics Fabrication Center (CPFC) into a stand‑alone commercial entity. CPFC, the nation’s only pure‑play III‑V compound semiconductor foundry, operates a 40,000‑square‑foot facility with an additional 8,000 square feet of clean‑room...
The Great Divide: A Tale of Three Hardware Emulation Architectures
Hardware emulation, born in the 1980s to bridge the gap between slow gate‑level simulation and late silicon prototypes, has split into three architectural families: processor‑based, custom‑FPGA‑based, and commercial‑FPGA‑based. Processor‑style platforms, pioneered by Quickturn and later Cadence, deliver deep visibility but...
AMD Highlights Instinct MI430X GPU, Future HPC Systems at HPC User Forum
At the HPC User Forum in Austin, AMD unveiled its Instinct MI430X GPU, promising more than 200 teraflops of native FP64 performance—roughly six times the upcoming NVIDIA Rubin chip. The company highlighted the MI430X as a dual‑purpose accelerator for high‑precision...
AMD Reports 1st Quarter 2026 Financial Results
AMD reported first‑quarter 2026 revenue of $10.3 billion, a 46 percent year‑over‑year increase, with GAAP net income of $1.4 billion and non‑GAAP earnings of $2.3 billion. The Data Center segment drove growth, posting $5.8 billion in revenue, up 57 percent, fueled by EPYC CPUs and Instinct...
Twisting Atom Thin Materials Reveals New Way to Save Computing Energy
A KTH-led study published in Nano Letters shows that twisting two atom‑thin van der Waals antiferromagnet layers creates strong altermagnetic magnons, enabling magnetic‑based information transfer without electric currents or external magnetic fields. The approach leverages twist engineering to alter crystal...
JEDEC Previews LPDDR6 Roadmap Expanding LPDDR Into Data Centers and Processing-in-Memory
JEDEC unveiled its next‑generation LPDDR6 roadmap, aiming to push memory density to 512 GB per die and extend the technology beyond smartphones into data‑center and accelerated‑computing workloads. The upcoming standard will introduce a narrower x6 sub‑channel interface, flexible metadata carve‑outs, and...
AMD Zen 6 “Venice” In Leak: EPYC Samples with up to 192 Cores Indicate Significantly Denser Server Chiplets
AMD’s upcoming 6th‑Gen EPYC processor, codenamed “Venice,” has surfaced in engineering‑sample benchmarks showing configurations of 64, 128 and up to 192 cores. The leaks suggest a new chiplet architecture with up to 32 cores per Core Complex Die, potentially reducing...
Synopsys and TSMC Deepen AI Design Alliance: What It Means
Synopsys and TSMC announced an expanded AI design alliance that couples silicon‑proven IP, AI‑driven EDA flows, and advanced packaging for 3 nm and emerging 2 nm nodes. The partnership adds 64 G UCIe and 224 G high‑speed interconnect IP, agentic run assistance in the...
Siemens U2U 3D IC Design and Verification Panel
Siemens convened a panel of industry experts to discuss the shift from 2D chips to 3D ICs and chiplet architectures. The discussion highlighted how stacking multiple dies improves performance, power efficiency, and bandwidth for AI, HPC, and data‑center workloads. Panelists...
Availability of Arasan UFS 5.0 Host Controller IP
Arasan Chip Systems announced the immediate availability of its UFS 5.0 host controller IP for ASIC and FPGA designs. The IP supports up to 46.694 Gb/s throughput using M‑PHY HS‑Gear 6, targeting high‑end smartphones and edge‑AI devices. Arasan, a long‑time member of the...
Your GPUs Aren’t Slow, They Just Have a Short Memory
Graid Technology is tackling the growing KV‑cache bottleneck that plagues long‑context, agentic AI models. When the cache exceeds GPU HBM, it overflows to slower storage, causing latency spikes of up to 18× and throughput drops of tenfold. Graid’s KV Cache Server,...
AMD Preps Linux For CPPC HighestFreq Feature Coming With Future ACPI Spec
AMD’s Linux P‑State driver is being updated to support a new “HighestFreq” ACPI register that is expected to land in the upcoming ACPI 6.7 specification. The register addresses cases where boost ratios cannot be derived through linear interpolation because core performance‑to‑frequency...
LLM System Design Interview #42 - The Global Memory Trap
In a mock DeepMind interview, candidates are asked why a 5× increase in raw teraFLOPs yields only a 1.2× boost in end‑to‑end throughput. The correct answer points to the memory wall: GPU compute has outpaced global memory bandwidth, leaving the...
OpenCL 3.1 Released To Bolster AI & HPC Workloads
The Khronos Group announced OpenCL 3.1, the first major update since the provisional 3.0 release six years ago. The new version pulls several previously optional extensions—such as SPIR‑V kernel ingestion, sub‑group execution, integer dot‑product operations, and a device UUID query—into the...
Congatec Conga-TC300 COM Express Module Features up to Intel Core 7 350 Wildcat Lake Processor
congatec unveiled the conga‑TC300, a Type‑6 COM Express module powered by Intel’s 15 W Core Series 3 “Wildcat Lake” SoCs, including up to a six‑core Core 7 350. The board supports up to 64 GB DDR5‑6400 memory, optional UFS 3.1 storage, and a rich I/O set featuring...
Intel Is Said to Refresh Raptor Lake for LGA1700 Once Again: Old Socket, Renewed Life Extension, and a Rather Awkward...
Intel is reportedly planning a second Raptor Lake refresh for the LGA1700 socket, targeting an early 2027 launch. The leak suggests the update will reuse the Raptor Cove P‑cores and Gracemont E‑cores on the Intel 7 process, focusing on low‑to‑mid‑range models rather than...
AMD RDNA4: Driver Leaks Indicate a Change of Strategy for Upcoming GPUs
AMD’s driver updates reveal that its upcoming RDNA4 GPUs will likely skip a high‑end halo chip, focusing instead on smaller, power‑efficient designs for the mid‑ and upper‑mid‑range market. The leaks show new device IDs but no flagship SKU, suggesting a...
Intel Delays 18A Schedule: Manufacturing Problems Slow Down the Hopeful Centerpiece of the Foundry Offensive
Intel has delayed parts of its 18A production schedule as yield problems surface on the new RibbonFET and PowerVia node. The 18A process, touted as a breakthrough with Gate‑Around transistors and backside power delivery, is central to Intel's push to...
Shuttle XPC Cube SB860R8 Targets Workstation Workloads with Core Ultra 200 Support
Shuttle introduced the XPC cube SB860R8, a 14‑liter barebone workstation built around the LGA1851 socket for Intel Core Ultra 200 series processors. The system supports up to 24 cores, 192 GB DDR5‑5600 memory, and offers PCIe Gen5 x16 expansion, dual 2.5 GbE networking,...
Blaize and Winmate Forge Strategic Partnership to Accelerate Edge AI Integration in Ruggedized Systems
Blaize Holdings and Taiwan‑based Winmate have signed a strategic partnership to embed Blaize’s Graph Streaming Processor (GSP) AI accelerators into Winmate’s ruggedized hardware platforms. The deal targets roughly $15 million in revenue during the first year and includes a three‑year term...
ROCm 7.2.3 Brings Minor Updates, ROCm XIO Documentation
AMD released ROCm 7.2.3 less than a month after 7.2.2, delivering minor but useful updates to its open‑source GPU compute and AI stack. The release does not add new GPU or operating‑system support, and Ubuntu 26.04 LTS remains unsupported until the upcoming 7.3...
Week 18, 2026
AI‑driven workloads are reshaping the semiconductor landscape, boosting demand across wafers, high‑bandwidth memory, advanced packaging and optical interconnects. SEMI reported a 13% year‑over‑year rise in global silicon wafer shipments for Q1 2026, while Taiwan’s GDP surged 13.7% on AI‑related export growth....
Connecting the Dots: Why RISC-V System Design Is Entering a New Era
At the recent RISC‑V Now event, Andes and Arteris highlighted that the architecture’s future depends on system‑level design rather than just ISA advantages. Modern SoCs are becoming heterogeneous, with data movement now the dominant energy and performance bottleneck. Effective Network‑on‑Chip...
How AI Will Reshape Computer Systems by 2035: A Jeffersonian Dinner in San Francisco About Our 10,000x Future
The Computing Research Association’s Industry Salon gathered 20 AI and systems leaders in San Francisco on April 16, 2026 to envision computer systems in 2035. Participants, including Jeff Dean, Dave Patterson and academic pioneers, projected a 10,000‑fold increase in global...
Rethinking ECAD IT Infrastructure: From Fragmentation to an Engineering Platform
The semiconductor sector is confronting unprecedented design complexity driven by advanced nodes, heterogeneous integration, and AI‑enhanced workflows, exposing a critical gap in ECAD IT infrastructure. Traditional build‑it‑yourself models force companies to allocate extensive resources to custom DevOps, licensing, and orchestration,...
OM Podcast #49: An Interview with the CEO of the Florida Semiconductor Engine About Reshoring
In the latest Heizer Render Munson OM Podcast, Barry Render interviews Dr. Ron Piccolo, CEO of the Florida Semiconductor Engine, about the strategic importance of reshoring semiconductor capabilities. The discussion highlights that while high‑volume chip fabrication will stay global, advanced...
AMD’s Ryzen AI Halo Box Is Set to Launch in June – Strix Halo Apparently Gets Its Own Developer Enclosure
AMD is preparing a dedicated developer system called the Ryzen AI Halo Box, slated for a June 2026 release. The box will be built around the Ryzen AI Max+ 395 APU, which packs 16 Zen 5 cores, a Radeon 8060S iGPU with 40 RDNA 3.5 compute units, an XDNA 2...
From AI Servers to High-Speed PCBs: Why CCL Prices Are Entering a New Upcycle
Copper‑clad laminate (CCL) prices are entering a new upcycle as high‑frequency, AI‑driven servers, 5G infrastructure, and electric vehicles demand faster, thinner, and greener boards. Environmental mandates for lead‑free and halogen‑free formulations add complexity, while tighter dimensional tolerances push material costs...
Adiuvo Explorer Board Aims to Bring Artix UltraScale+ FPGA to $99 Platform
Adiuvo is engineering the Explorer Board, a $99 FPGA development platform built around Xilinx’s Artix UltraScale+ AU7P. The board packs 37K LUTs, 216 DSP slices, 3.6 Mb of block RAM and integrated GTH transceivers, and adds external HyperRAM for larger memory...
Boardcon PICOT536 SoM and EMT536 SBC Feature Allwinner T536 Edge AI Processor
Boardcon has introduced the PICOT536 system‑on‑module and the EMT536 development board, both built around Allwinner’s T536 edge‑AI processor. The T536 combines a quad‑core Cortex‑A55 CPU, RISC‑V co‑processors and a 2 TOPS NPU, supporting up to 8 GB LPDDR4/LPDDR4X and 64 GB eMMC storage....
Self-Healing Synaptic Transistor Recovers Memory After Damage
Researchers have created a fully self‑healing, stretchable synaptic transistor that regains most of its function after being cut in half. The device restores about 80% of its operating current and over 90% of its memory within 24 hours without external triggers,...
China Weekly Wrap: Cambricon Earnings Edition
Cambricon’s Q1 earnings sparked a 160% revenue jump and 185% net‑profit surge, lifting the STAR50 index about 8.1% and driving on‑shore Chinese benchmarks higher. On‑shore indices such as the CSI 300 and SSE Mega‑cap posted gains of 0.8%‑2.4%, while dividend‑focused stocks...
GeForce RTX 5070 Laptop GPU with 12 GB: Leak Benchmarks Show Why More VRAM Does Not Automatically Mean More FPS
NVIDIA quietly added a 12 GB VRAM option for the GeForce RTX 5070 Laptop GPU via driver 596.36. Leaked benchmarks show the 12 GB variant matches the 8 GB model in traditional gaming tests, with only a ~2% variance, but it pulls ahead in...
An AI Analysis of Qualcomm: The Edge Is Where AI Will Live
Qualcomm is positioning itself as the primary supplier of edge‑AI silicon as artificial intelligence moves from data‑center servers to billions of endpoint devices. The company’s Snapdragon line, built over two decades for power‑efficient inference, targets smartphones, PCs, cars, industrial sensors...
PCIe 7.0 Officially Finalized: 512 GB/S Bandwidth Clearly Targets AI Infrastructure
PCI SIG officially released the PCIe 7.0 specification, delivering 128 GT/s per lane and up to 512 GB/s bidirectional bandwidth in an x16 configuration. The new standard retains PAM4 signaling but adds stronger forward error correction, better energy efficiency, and tighter signal stability. It...
Premium: Inference Waves
NVIDIA’s stock surged 78% over the trailing twelve months, rebounding 20% in April to end the year up 5% despite macro headwinds. The company posted a record quarter of net new revenue and guided an even faster Q1, all without...
AI Demand Strong, Memory Prices Will Go Up and AI Model Profits Are Proven
Anthropic is on track to hit a $44 billion annual run rate, aiming for $100 billion by the end of 2026. Nvidia’s SOCAMM memory contract price has jumped to roughly $8 per gigabyte for 1Q26 and could exceed $13 per gigabyte later...
PsiQuantum Appoints Lip-Bu Tan to Board of Directors
PsiQuantum announced that Lip‑Bu Tan, Intel CEO and veteran semiconductor executive, has joined its board of directors. Tan brings decades of experience scaling chip design and manufacturing, complementing PsiQuantum’s push to build utility‑scale, fault‑tolerant quantum computers using silicon photonics. The...
Bronco AI Webinar: Full-Chip SoC Debug in 15 Minutes
Bronco AI’s new platform promises to cut full‑chip SoC debug cycles from days to under 15 minutes by leveraging large‑scale AI reasoning models integrated with a proprietary EDA stack. The system automatically gathers logs, waveforms, code and specifications at regression...
TSMC: The Chokepoint of the AI Economy
TSMC has shifted from a consumer‑silicon foundry to the core AI compute factory, a transition now confirmed by its record Q1 2026 results. Revenue jumped 40.6% to $35.9 billion and gross margin rose to 66.2%, reflecting monopoly‑style pricing. High‑performance‑computing wafers now make...
Twisted Boron Nitride Boosts Deep-UV Light Emission for LEDs
Researchers at South Korea's POSTECH have created a moiré quantum well by stacking twisted hexagonal boron nitride (hBN) layers, achieving deep‑ultraviolet (200‑230 nm) light emission about 20 times more efficient than conventional aluminum‑gallium nitride (AlGaN) LEDs. The weak interlayer bonding of...
Everspin Executes $40M Agreement for Mil-Aero MRAM Applications
Everspin Technologies announced a $40 million agreement with a U.S. prime contractor to supply Toggle MRAM process technology and engineering services for Department of War programs. The deal positions Everspin as a subcontractor delivering foundry and engineering support over the next...
Guillaume Etorre Joins SiPearl as Chief Operating Officer
SiPearl, the European fabless designer of high‑performance, energy‑efficient CPUs, announced the appointment of Guillaume Etorre as Chief Operating Officer. Etorre, who joined on Jan 26 2026, reports to CEO Philippe Notton and will oversee chip design, applications, reference systems, operations, quality, and...
Intel Making More GPU Driver Improvements For Crescent Island With Linux 7.2
Intel is advancing driver support for its upcoming Crescent Island Xe3P GPU, a 160 GB‑vRAM inference‑optimized card aimed at enterprise AI workloads. Open‑source engineers have added system‑controller firmware support, OA performance‑monitoring tweaks, GT tuning fixes, and HWMON energy attributes to the...
Diversion and Resale: Estimating Compute Smuggling to China
Epoch AI’s new report estimates that between 290,000 and 1.6 million Nvidia H100‑equivalent chips were smuggled into China by the end of 2025, with a median of 660,000 chips – roughly 3% of the world’s AI compute stockpile. The analysis draws...
The Latest News In Metrology
Park Systems has acquired Utah‑based Rocky Mountain Nanotechnology, marking its first foray into AFM probe manufacturing and enabling a dedicated production line in South Korea while keeping its U.S. facility operational. The company also unveiled the NX1, a compact AFM...
Google to Sell TPU Chips as Gemini Shows Returns
Alphabet announced it will begin selling its custom Tensor Processing Units (TPUs) to a limited set of customers who will install the chips in their own data centers, shifting from its previous model of renting TPU capacity. The change was...
Solving the EDA Tool Fragmentation Crisis
The Calibre Connectivity Interface (CCI) converts LVS verification data into a universal, queryable database, allowing diverse EDA tools to share accurate design information without manual translation. By tapping the Standard Verification Database, CCI feeds parasitic extraction, power‑integrity, electromagnetic, and soft‑error...
Apple Share of the Smartphone SoC Market Grew From 15% to 19% in Q1
Global smartphone system‑on‑chip shipments fell 8% YoY in Q1 2026, yet Apple’s share rose from 15% to 19%, reflecting strong demand for its premium devices. Counterpoint Research notes the premium segment stayed resilient while entry‑level makers shifted to cheaper chips....