Linux Patch Introduces Panther Lake R: Ruggedized Version Of Panther Lake
Intel has added a Linux kernel patch that reveals a ruggedized variant of its Panther Lake processor, dubbed Panther Lake R. The new SoC carries a distinct model ID 223, indicating hardware changes beyond a simple thermal‑range tweak. It combines performance‑focused P‑cores with low‑power E‑cores designed for harsh, industrial environments. The patch brings native Linux support, positioning the chip for edge‑computing and industrial IoT deployments.
G42 and Government of India Formalize Commercial Framework for Condor Galaxy India AI Supercomputer
G42 and the Government of India have signed a commercial framework to deploy Condor Galaxy India, an 8‑exaflop AI supercomputing cluster built from 64 Cerebras CS‑3 wafer‑scale systems. The partnership tasks G42, together with India’s Centre for Development of Advanced...
NVIDIA Vera: 88 Arm Cores and Alleged Early Customers for the Next AI Platform
NVIDIA unveiled the Vera CPU, an Arm‑v9.2‑compatible processor built on 88 in‑house Olympus cores that deliver 176 threads, up to 1.5 TB of LPDDR5X memory and 1.2 TB/s bandwidth. The chip connects to Rubin GPUs via NVLink‑C2C, offering 1.8 TB/s coherent bandwidth, and...
D2D China: Are the GPU Sanctions Working?
The U.S. ban on GPU shipments to China has halved Nvidia's market share there, while Chinese firms accelerate domestic semiconductor development. Microsoft’s recent certification of Chinese GPUs and a surge in locally sourced wafer‑fab equipment signal a growing home‑grown ecosystem....
NEO Semiconductor Demonstrates 3D X-DRAM Proof-of-Concept, Secures Strategic Investment to Advance AI Memory
NEO Semiconductor announced that its 3D X‑DRAM proof‑of‑concept chips meet key DRAM performance targets, including sub‑10 ns read/write latency and over 10¹⁴‑cycle endurance, using mature 3D NAND manufacturing lines. The results validate a new scaling path for high‑density, low‑cost AI memory....
Arm Preparing The Linux Kernel For 128-Bit Page Table Entries "FEAT_D128"
Arm announced an optional feature, FEAT_D128, for Armv9.3 and later that enables 128‑bit page table entries in the Linux kernel. The new translation system, VMSAv9‑128, expands both physical and virtual address spaces and frees bits for future MMU controls. Linux...
SpacemiT K3-Powered DC-ROMA RISC-V Motherboard III Is Made for the Framework Laptop 13
SpacemiT has launched the DC‑ROMA RISC‑V Mainboard III, an octa‑core K3 64‑bit SoC board that slots into the Framework Laptop 13. The module delivers up to 60 TOPS of AI performance, supports 16 GB or 32 GB LPDDR5 RAM and an optional 1 TB NVMe SSD....
Samsung Negotiates for an Agreement: Impending 18-Day Strike Could Affect AI Memory and HBM Supply Chains
Samsung Electronics is in mediated talks with its largest union over wages and profit‑linked bonuses, with an 18‑day strike slated to begin May 21, 2026 if no deal is reached. The dispute targets the chip division that posted roughly $100 billion in...
Tesla AI6.5 Reportedly Before Foundry Switch: Weibo Rumor Brings Intel Into Play Instead of TSMC
According to a Weibo leak cited by Wccftech, Tesla may consider moving production of its upcoming AI6.5 accelerator from TSMC to Intel under alleged U.S. political pressure. The claim is unverified; Tesla’s current AI5 chip is already fabricated by TSMC...
Micron Samples 256GB DDR5 RDIMM Built on 1-Gamma DRAM for AI Servers
Micron Technology announced sampling of a 256 GB DDR5 registered DIMM built on its 1‑gamma DRAM platform, capable of 9,200 MT/s—about 40% faster than current volume‑produced modules. The module uses 3D‑stacked dies connected by through‑silicon vias, delivering higher capacity and power efficiency,...
Beyond Tool Interoperability: The Emerging Governed Convergence Problem in Semiconductor Design
The semiconductor sector is moving past tool interoperability toward a "governed convergence" challenge, where specialized tools, domains, and organizations must align to produce manufacturable, high‑performance systems. Fragmentation now spans abstraction layers, physics domains, and decision authority, creating an "entropy wall"...
Cerebras IPO and the Four Bottlenecks in Its Custom-Everything Architecture
Cerebras Systems went public this week with an IPO that was oversubscribed by roughly 20‑times, underscoring strong investor enthusiasm for its wafer‑scale AI chips. The company’s flagship Wafer Scale Engine 3 (WSE‑3) integrates 900,000 cores, 44 GB of SRAM and 21 PB/s of...
Taiwan’s Chips Power the Global Economy. China Holds the Leverage
Taiwan’s semiconductor champion TSMC supplies roughly 90% of the world’s most advanced chips and 99% of the AI‑training silicon that powers smartphones, electric vehicles and the global AI race. A serious disruption—whether from a blockade, customs inspections or outright conflict—could...
Week 19, 2026
Global semiconductor sales surged to $298.5 billion in Q1 2026, a 79.2% year‑over‑year increase, reflecting booming AI‑driven demand. NVIDIA announced new collaborations with Corning and IREN to expand U.S. optical connectivity and target up to 5 GW of AI infrastructure, while GlobalFoundries...
Sony and TSMC Hint at the Future of Imaging Sensors and “Physical AI”
Sony Semiconductor Solutions and Taiwan Semiconductor Manufacturing Company have signed a non‑binding memorandum of understanding to deepen collaboration on next‑generation imaging sensors. The alliance pairs Sony’s market‑leading sensor design capabilities with TSMC’s cutting‑edge process technology, aiming to explore emerging "physical...
Applied Materials and TSMC Partner at the EPIC Center to Accelerate AI Scaling
Applied Materials announced a new innovation partnership with TSMC at its $5 billion EPIC Center in Silicon Valley to speed AI‑focused semiconductor development. The collaboration will co‑innovate on materials engineering, next‑generation equipment, and advanced process integration to improve power, performance, area,...
TMTB: Cerebras (CRBS) IPO Roadshow Notes
Cerebras Systems disclosed a massive take‑or‑pay contract with OpenAI worth over $20 billion, beginning with a $1 billion prepayment and delivering 750 MW of AI compute across three 250 MW tranches from 2026 to 2028. The first tranche will be provided through Cerebras' cloud...
Ceva Clinches Bluetooth HDT Contract with US-Based Semiconductor Client
Ceva announced a contract to supply its Bluetooth High Data Throughput (HDT) solution to an unnamed U.S. semiconductor original equipment manufacturer. The client, an existing Ceva‑Waves user, will adopt a platform that merges a digital baseband, Ceva’s in‑house 2.4 GHz RF,...
Intel IGC 2.34.4 Compiler Brings Many Improvements
Intel released the Graphics Compiler (IGC) version 2.34.4, the core component powering the Intel Compute Runtime for Level Zero, OpenCL, and Windows graphics shaders. The update brings WideMulMad instruction support, code‑scheduling refinements, and default activation of a 2D load‑splitting pass. It...
Panel Discission: Beyond Moore’s Law and the Future of Semiconductor Manufacturing
The semiconductor sector is moving into a post‑Moore’s Law era where transistor shrink alone can no longer deliver performance gains. Panelists highlighted that AI‑driven analytics, massive data pipelines, and intelligent manufacturing ecosystems are becoming essential to improve wafer yields and...
The Great Memory Panic of 2026
Apple is confronting a sharp rise in memory component costs, which now represent 15%‑40% of a device’s bill of materials. The spike stems from limited variable‑capacity suppliers, pushing marginal pricing higher while base‑load contracts remain steadier. Apple can absorb short‑term...
New Data Center NVMe SSD From PetaIO
PetaIO, a Chinese venture‑backed storage firm, announced its new PCIe Gen6 NVMe SSD platform at MemoryS 2026. The offering is built around the Titanium Himalaya controller, a 6 nm chip delivering over 28 GB/s sequential reads, 50 M IOPS random reads, and 2.7 µs latency....
Linux 7.2 To Add Support For Switchtec PCIe Gen6 Switches
The Linux 7.2 kernel will ship native support for Microchip’s Switchtec PCIe Gen 6 switches. The Switchtec family, fabricated on a 3 nm process, offers up to 20 ports and 160 PCIe lanes, targeting AI/ML training clusters, hyperscale cloud platforms, and NVMe 6.0 storage....
AMD X970E in Leak: AM5 Refresh Is Said to Continue Relying on PROM21 and Place Greater Focus on CUDIMM
A leak suggests AMD’s upcoming X970E motherboard will retain the PROM21 chipset foundation used in current high‑end AM5 platforms, rather than introducing a brand‑new I/O architecture. The primary differentiator appears to be full support for CUDIMM, a clock‑enhanced DDR5 module...
Up to 256 MB FERRIT Modular F-RAM Storage Device Preserves Critical Data for up to 200 Years
Machdyne introduced FERRIT, a modular USB‑C storage device that stacks up to 256 MB of ferroelectric RAM (F‑RAM) across removable 16 MB cards. The system, driven by a Raspberry Pi RP2040 controller, promises data retention for up to 200 years and virtually unlimited write...
The Suburbs Become the Middle Layer of the AI Stack
Nvidia, smart‑panel startup Span, and homebuilder PulteGroup unveiled XFRA nodes—compact AI servers the size of an HVAC box designed for suburban homes. Each unit houses a Dell PowerEdge server with 16 Nvidia RTX Pro 6000 GPUs, four AMD EPYC CPUs...
Linux Enables Auto Counter Reload "ACR" For Intel Xeon Diamond Rapids
The Linux kernel’s perf subsystem received a one‑liner patch that enables Auto Counter Reload (ACR) on the upcoming Intel Xeon Diamond Rapids processors. The change lands in the Linux 7.1‑rc3 release and is slated for back‑porting to current stable kernels. ACR...
ASUS Is Reportedly Scaling Back Its RTX 5070 Ti Focus in Favor of the RTX 5080: Blackwell Supply Is Apparently...
ASUS is reportedly scaling back production of several GeForce RTX 5070 Ti models in Q2 2026, shifting capacity toward the higher‑priced RTX 5080. Both cards share 16 GB GDDR7 memory, but memory shortages and margin considerations are prompting ASUS to prioritize the more profitable 5080....
Foundryecosystem Report: Terafab; Capacity, EUV, GaN
Semiecosystem’s latest Foundryecosystem Report highlights a series of pivotal developments across the semiconductor sector. Elon Musk’s Texas “Terafab” is projected to require $55 billion for its first phase and up to $119 billion overall, while 3nm capacity remains scarce and TSMC dominates...
AMD Delivers Plug-In AI Power with PCI-Based GPU
AMD unveiled the Instinct MI350P, a PCIe Gen5 GPU that slots into existing servers and delivers up to 4,600 teraflops of MXFP4 AI performance. The accelerator packs 185 billion transistors, 144 GB of HBM3e memory, and 4 TB/s of bandwidth while staying within a...
DOE and NVIDIA Detail Genesis Mission Plans at SCSP AI+ Expo
U.S. Energy Secretary Chris Wright and NVIDIA’s Ian Buck announced the Genesis Mission at the SCSP AI+ Expo, a joint DOE‑NVIDIA effort to embed artificial intelligence into energy research. The partnership will deploy two AI supercomputers at Argonne National Laboratory—Equinox...
NVIDIA and IREN Partner on 5GW AI Infrastructure Deployment Initiative
NVIDIA and IREN Limited announced a strategic partnership to roll out up to 5 GW of NVIDIA DSX‑aligned AI infrastructure across IREN’s global data‑center pipeline. The deal includes a five‑year option for IREN to purchase up to 30 million NVIDIA shares at...
Feisal Somji of Sio Silica to Deliver Keynote at CMI Summit 5 on Securing North America’s Silica Supply Chain for...
Feisal Somji, founder and CEO of Sio Silica, will headline CMI Summit 5 in Toronto with a keynote on using silica to secure North America’s supply chain during the Fourth Industrial Revolution. He will argue that ultra‑high‑purity silica is a strategic material...
CEO Interview with Dave Kelf, CEO of Breker Verification Systems
Breker Verification Systems reported a 35% revenue increase in 2025, mirroring its 2024 growth, and expects an even stronger 2026 as demand for functional verification accelerates. The company expanded its engineering footprint with a new support facility in Bangladesh and...
Who Needs Moore’s Law?
Moore’s Law, which predicted a doubling of transistor density every two years, has effectively stalled since 2016‑2018 as physical limits loom. Chip manufacturers are now turning to alternative architectures—ASICs, GPUs, 3D‑stacked chiplets, on‑chip memory, optical interconnects, and quantum bits—to keep...
Linux Erroneously Thinks Intel Bartlett Lake CPUs Run At 7GHz
Linux’s Intel P‑State driver is erroneously reporting Bartlett Lake P‑core‑only CPUs at over 7 GHz, despite the Core 9 273PE’s documented turbo ceiling of 5.7 GHz. The discrepancy stems from an incorrect scaling factor in the driver, which a QNAP engineer, Henry Tseng, has addressed with...
6.67-inch Flexible AMOLED Display Works with Raspberry Pi, LattePanda, and Other SBCs with HDMI Output
DFRobot has launched a 6.67‑inch flexible AMOLED display that ships with a dedicated MIPI‑to‑HDMI driver board, allowing plug‑and‑play operation on popular single‑board computers such as Raspberry Pi, LattePanda, Banana Pi and Orange Pi. The panel delivers a 2400 × 1080 resolution, 450 cd/m² brightness, 16.7 million colors,...
The 100-Second Bottleneck Behind NVIDIA CPO: 7 Companies That Own the 4-Stage Test Stack
The testing stage of coherent photonic‑on‑chip (CPO) production has become the primary bottleneck, with a full optical inspection of each photonic integrated circuit taking over 100 seconds. TrendForce data and recent earnings show that seven specialist equipment firms—FormFactor, Teradyne, Keysight,...
Intel Arc Celestial at Idle: Leak No Longer Sees Dedicated Xe3P Gaming GPUs
Recent leaks indicate Intel has scrapped plans for a dedicated Xe3P “Celestial” Arc gaming GPU line. While the Xe3P architecture remains alive in integrated graphics, mobile platforms, workstations and the Crescent Island datacenter accelerator, no discrete desktop gaming cards are...
SEMIFIVE and ICY Tech Announce 8 Nm eMRAM SoC Tape-Out at Samsung Foundry
SEMIFIVE and ICY Tech announced the successful tape‑out of an 8‑nm eMRAM‑based edge AI system‑on‑chip (SoC) using Samsung Foundry’s 8LPU‑eMRAM process. The design integrates non‑volatile magnetoresistive RAM directly on the chip, targeting low‑power, latency‑critical applications such as industrial controllers, automotive...
Arbor ARES-2100 Wildcat Lake Fanless Box PC Targets Industrial Automation, Machine Vision, and Edge AI Applications
Arbor introduced the ARES‑2100 fanless box PC, built around Intel’s new Core Series 3 “Wildcat Lake” processor aimed at industrial automation, machine‑vision and Edge AI workloads. The compact 1U system supports up to 64 GB DDR5, UFS 3.1 or NVMe storage, three 2.5 GbE...
Nvidia Vera Rubin Used by Google Could Next and Thinking Machines Lab
NVIDIA unveiled its Vera Rubin platform, pairing the Rubin GPU with the Vera CPU to deliver a full‑stack AI system that claims ten‑fold better inference performance per watt than the Blackwell generation. At Google Cloud Next, the company announced the...
RISC-V: From Niche Architecture to Strategic Foundation
At the RISC‑V Now by Andes conference, Aion Silicon’s CEO Oliver Jones declared that RISC‑V has moved from a niche alternative to a strategic foundation for modern silicon. The company’s experience delivering dozens of 7 nm and smaller designs shows the...
Culpan: Apple Goes All in on MacBook Neo Production ↦
Apple is ramping up MacBook Neo output to 10 million units, double its original forecast, after the laptop’s sales outpaced expectations and strained A18 Pro chip supplies. The company has asked TSMC for a hot‑lot of the N3E‑based chips used in...
Linux 7.2 To Support Realtek RTL8159 10GbE USB Ethernet
The Realtek RTL8159 10 Gbps USB Ethernet chipset, currently supported only by Realtek’s out‑of‑tree driver, will be merged into the mainline Linux kernel with the upcoming 7.2 release. Open‑source contributor Birger Koblitz ported the code to the r8152 driver and added...
SiPearl and Semidynamics Partner to Develop EU-Sovereign Rack-Scale AI Compute Platform
European fabless CPU designer SiPearl and Barcelona‑based AI infrastructure firm Semidynamics announced a strategic partnership to create a rack‑scale AI compute platform built entirely with European‑sourced components. The system will pair SiPearl’s Arm‑based Rhea1 CPU with Semidynamics’ RISC‑V GPU/AI inference...
Stacking 2D Materials on Bulk Semiconductors Yields Smarter, Faster Photodetectors
A new review outlines how stacking atomically thin 2D crystals onto bulk 3D semiconductors creates photodetectors with record‑high responsivity, detectivity and gigahertz‑level speed. Van der Waals bonding eliminates lattice‑mismatch defects, allowing seamless integration of materials like graphene, TMDCs and black phosphorus with...
Bringing Mathematical Rigour in the World of Hardware – a Journey Into Formal Verification
Robert Simpson, a mathematics graduate, joined Axiomise to apply formal verification (FV) to silicon design. He describes how rigorous logical reasoning uncovers bugs that conventional testing misses and how his academic habits translate to real‑world hardware correctness. At Axiomise, he...
Rambus Introduces PCIe 7.0 Switch IP with Time Division Multiplexing for Scalable AI and Data Center Infrastructure
Rambus announced a PCIe 7.0 Switch IP that incorporates time‑division multiplexing (TDM) to address the bandwidth and latency challenges of next‑generation AI and data‑center system‑on‑chips. The new switch enables flexible traffic scheduling across shared PCIe links, improving fabric utilization for large‑scale...
DDR6 Moves Into Early Development: Memory Manufacturers Apparently Target 2028 to 2029
Samsung, SK hynix and Micron have asked substrate partners to start early DDR6 development, moving the next DRAM generation from roadmap to pre‑production. The industry targets a 2028‑2029 commercialization window, with the first modules aimed at server and AI workloads rather...