Bull V. Bear: Why INTC Might Need to "Promise the World" In Guidance
Intel is set to release its Q2 earnings after market close, with Wall Street forecasting roughly $12.3 billion in revenue and earnings per share hovering around breakeven. The chipmaker’s stock has surged more than 200 % over the past year as investors bet on new CEO Pat Gelsinger’s turnaround plan. Analysts expect revenue to decline about 2 % year‑over‑year and the foundry segment to post a $2.4 billion loss, while PC sales and AI data‑center demand remain under pressure from rivals such as Nvidia. Options data reveal a pronounced call‑skew, suggesting many traders are still bullish despite the weak fundamentals. During the Fast Market discussion, Kevin Green warned that “the numbers are not sexy” and that Intel must “promise the world” in its guidance to keep the rally alive. Elon Musk’s recent comment about using Intel’s A14 process added a brief uptick, but skeptics questioned whether the deal reflects technology merit or political pressure. The mixed outlook means investors will likely focus on Intel’s roadmap rather than the immediate earnings beat. A disappointing guide could trigger heightened volatility, rewarding bearish strategies like put diagonal spreads, while a strong forward‑looking outlook may sustain the stock’s momentum and attract further speculative buying.
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[Econ & Biz] Korean Chip Giants' Q1 Earnings Prove AI Supercycle Is Real
South Korea’s two chip powerhouses, Samsung Electronics and SK Hynix, reported unprecedented first‑quarter 2026 results, underscoring what analysts call an AI‑driven supercycle. Samsung posted 133 trillion won in revenue, up 68.1% YoY, and a staggering 57.2 trillion won operating profit –...
Why Computer Chips Are So Expensive Right Now
The video explains why computer chips, especially memory modules, have surged to record‑high prices, using the recent resale price jump of a 2020 PlayStation as a concrete illustration. A confluence of factors is driving the spike: a pandemic‑triggered demand boom for...
TSMC Earnings, Cerebras S1, Custom Semi Rumors, Apple CEO Change
The episode opens with Ben Bajarin and Jay Goldberg dissecting TSMC’s latest earnings release. The Taiwanese foundry posted revenue and margin beats for the March quarter, lifted its capital‑expenditure outlook, and announced a second N3 fab in Tainan and a...
Rebellions CEO: AI Compute Power Has Shifted to Inference
The conversation with Rebellions CEO Seyun Park centered on a fundamental shift in AI infrastructure: compute power is moving from the training phase to inference, prompting hyperscalers to explore custom, heterogeneous chip solutions beyond Nvidia’s traditional stronghold. Park highlighted that...
Google to Release New AI Chips, Challenging Nvidia | Bloomberg Tech 4/20/2026
Google is set to announce a new generation of Tensor Processing Units (TPUs) at its Las Vegas AI infrastructure event this week, marking the first dedicated inference‑only accelerator from the company. The chip splits training and inference workloads, a move analysts...
RISC-V 2026 Update
The video provides the 2026 RISC‑V annual review, highlighting the open‑source ISA’s rapid expansion beyond microcontrollers into cloud servers, AI accelerators, and automotive systems. It notes that SHD forecasts RISC‑V will reach 33.7% market penetration by 2031, up from 2.5%...
The Sheer Audacity of AMD
AMD announced a limited‑edition re‑launch of the Ryzen 7 5800X3D as an AM4 “10th Anniversary” model, while the new Ryzen 9 9950X3D2 Dual Edition appears on Amazon with a $1,000 pre‑order price despite an $899 MSRP. Intel’s upcoming Core Ultra 400 “Nova Lake‑S” lineup leaked, showing...
AI Boom Driving $100 Bln Chip Opportunity, Arm CEO Says
Arm CEO Rene Haas announced the company’s first AGI‑focused CPU, designed for the exploding AI data‑center market. Built on TSMC’s process, the chip is already in production and slated for shipment by year‑end. Haas highlighted that generative and agentic AI workloads...
Date Rate Calculation || Verilog Coding Techniques Part 16 #allaboutvlsi #vlsi
The video walks through a Verilog‑style calculation of data rates for two simple modules. Module A sends four bits on each rising clock edge at a 100 MHz frequency, while Module B receives the parallel data and converts it to a serial stream...
The Idea That China Can't Have AI Chips Is Nonsense - Jensen Huang
In a recent interview, Nvidia CEO Jensen Huang dismissed the idea that China is unable to field advanced AI chips, arguing that the country’s massive energy reserves and under‑utilized data‑center capacity give it a solid foundation for large‑scale AI compute. Huang...
10X GPU Revenue Our Strategy to $200M ARR
HIVE Digital Technologies announced a $100 million oversubscribed financing round to accelerate its AI hardware push. CEO Aydin Kilic outlined a target of $200 million in GPU‑driven revenue by 2026, anchored by rapid infrastructure expansion. The plan hinges on deploying NVIDIA’s upcoming...
Server - OCE - Chiplet Systems - Workstream (2025-04-22)
The OCP Chiplet Systems workstream convened to review progress on its new wiki page, clarify the charter, and assign ownership of key focus areas. Participants highlighted the current duplication of official and internal wiki sites and agreed to merge them...
Server - OCE - Chiplet Systems - Workstream (2025-04-29)
The Open Compute Ecosystem (OCE) workstream convened to outline a specification that will guide multi‑vendor chiplet design and integration across the industry. Participants mapped out the specification’s structure, assigning chapter leads for silicon architecture, security, power, performance optimization, and packaging,...
Seminar in Comp. Arch. - S1: ColumnDisturb & ABACuS (Spring 2026)
The seminar introduced column disturbance, a newly documented read‑disturbance effect in modern DRAM. Presenter Yong Jo explained the open‑bitline architecture of DDR4 and HBM2 chips, then described how aggressive activation of a single row can perturb bit‑lines across an entire...
Decoder Based RAM Design in Verilog | SystemVerilog Testbench Series Day 2
The video walks through a Verilog implementation of a decoder‑based RAM module, the second installment of a SystemVerilog testbench series. It outlines the architecture of a 128‑byte memory organized as four 32‑byte blocks, each accessed via a 7‑bit address where...
Musk Pushes Terafab Suppliers to Move at ‘Light Speed’
Elon Musk’s team is advancing the proposed Terafab joint venture between Tesla and SpaceX by reaching out to chip‑making equipment suppliers for pricing and delivery timelines. The outreach emphasizes ultra‑fast procurement, reflecting Musk’s “light‑speed” mantra for the project’s rollout. Terafab...
Tech Podcast: Ambarella Evolves AI Go-To-Market Strategy | AI With Sally
In this episode of AI With Sally, Ambarella’s Customer Growth Officer Manibb Minazudin explains how the chipmaker is overhauling its go‑to‑market approach. Historically, Ambarella sold directly to large OEMs and automotive tier‑one suppliers, avoiding resellers or channel partners. The company now aims...
Frontier IP Group CEO on €211M Boost for 2D Photonics
Frontier IP Group’s CEO Neil Crabb announced that its portfolio company 2D Photonics has secured a €200 million grant from the Italian government, approved by the EU, to accelerate development of advanced graphene‑based photonic chips. The funding will finance a pilot plant...
Altera Agilex™ 5 FPGAs & SoCs | Digital Datasheet
Intel’s Altera Agilex 5 family, announced in the digital datasheet video, combines FPGA fabric and SoC capabilities on the 7‑nm Intel process. The line targets mid‑range applications that need high performance in a compact, power‑efficient package. The devices leverage second‑generation HyperFlex architecture,...
Introduction to System Verilog Testbench || Decoder Based RAM Verification Part - 1 ||
The video walks through building a SystemVerilog testbench to verify a decoder‑based RAM, using a 16‑location, 8‑bit example. It first distinguishes a SystemVerilog testbench from a plain Verilog environment and outlines the verification plan that serves as the blueprint. It details...
Jensen Huang Fires Back on China Chip Ban
Nvidia CEO Jensen Huang pushed back against recent U.S. proposals to restrict chip shipments to China, framing the debate as a question of American competitiveness rather than security. Huang argued that a blanket ban would undermine the United States’ own AI...
"Can We Do Better?" Prof. Onur Mutlu's MICRO 2025 Keynote Talk at Seoul - 21.10.2025
Prof. Onur Mutlu’s MICRO 2025 keynote, titled “Can We Do Better?”, framed the memory bottleneck as the central obstacle to energy‑efficient, high‑performance computing. He argued that while the industry has long treated computing as an energy problem, the majority of...
This Is How Intel Fell Behind
The video chronicles Intel’s flagship desktop CPUs from the 2017 Core i7‑7700K through the 10th‑gen Core i9‑10900K, illustrating how a series of incremental upgrades and strategic missteps allowed AMD to overtake the performance crown. Key technical points include Intel’s reliance on...
The Future of 6G, Built on a Chip
The Engineering Innovations podcast featured Purdue PhD candidate Connor Devitt discussing his Nature paper on a world‑first on‑chip tunable spin‑wave ladder filter. The device leverages flat‑dispersion spin waves to provide frequency‑agile filtering across the newly opened 7‑24 GHz mid‑band, a spectrum...
From 400G BiDi to 1.6T: Cisco Optics for Al Fabrics
Cisco’s product briefing introduced its third‑generation 400 Gbps bidirectional (BiDi) multimode optics, positioning them as a seamless upgrade path for existing data‑center fabrics. By reusing existing multimode fiber and swapping only the transceiver, customers avoid costly trenching, new patch panels, and...
Taiwan Chip Industry Looks to Avoid Energy and Helium Shortage
The episode focuses on Taiwan’s semiconductor sector warning that regional conflicts, notably the Iran war, are threatening critical energy and helium supplies needed for advanced chip fabrication. The Taiwan Semiconductor Industry Association (TSIA), representing giants like TSMC, MediaTek and UMC,...
Tutorial: Powering Agentic Inference with @SambaNovaSystems | Agentic AI Conference
The tutorial highlighted SambaNova’s strategy for solving the "agentic inference" infrastructure crisis by showcasing its end‑to‑end stack—from custom SM50 silicon to cloud‑run deployments. Quasian Koma, director of AI solutions engineering, explained how the company’s full‑stack platform combines low‑power racks, high‑throughput...
The Hidden Gas Crisis That Could End the AI Boom
The video exposes a looming helium crisis that could choke the artificial‑intelligence hardware supply chain. While Wall Street bets on limitless AI growth, the ultra‑pure liquid helium needed to cool ASML’s extreme‑ultraviolet lithography machines is a non‑renewable by‑product of natural‑gas...
Arm CEO Says AI Is 'Much Bigger' Than the Internet Shift
In a recent interview, Arm’s chief executive highlighted that artificial intelligence represents a transformation “much bigger” than the shift to the internet, arguing that the current wave will dwarf previous cycles such as personal computers and mobile adoption. He pointed to...
If You Need a Laptop, Buy It Now
The video warns that a worldwide shortage of RAM – the short‑term memory that powers every computer, phone and console – is about to make consumer tech noticeably more expensive. The shortage is directly linked to the AI boom,...
Arm CEO Haas on Shifting From Smartphones to AI
In a candid interview, Arm chief executive Rene Haas outlined the company’s strategic pivot away from its traditional smartphone‑centric business toward designing AI‑optimized processors for cloud and data‑center workloads. Haas said Arm’s first “AGI” CPU, built on TSMC’s process and already...
PCPer Podcast 863: Ryzen 9950X3D2 Pricing, Raptor Lake Still Part of Intel Plan, Compress Your VRAM
The PC Perspective podcast episode 863, recorded April 8 2026, opened with the usual banter before diving into the week’s headline tech news. The centerpiece was AMD’s announcement of the Ryzen 9 9950X3D2, a dual‑3D‑V‑Cache desktop processor priced at $899 and slated for an April 22...
Is the AI Infrastructure Boom Real? CRWV, Chipmakers, and Concentration Risk
The segment’s focus was CoreWeave’s announcement of a multi‑year data‑center partnership with Anthropic, sparking fresh debate on whether the AI infrastructure boom is sustainable or merely hype. Analysts highlighted that the deal’s terms—particularly guarantees on next‑generation chip access and usage commitments—remain...
Inside Arm’s AI Pivot: From Smartphones to the Cloud | Bloomberg Tech: Europe 4/10/2026
Arm is making a decisive move from pure chip design licensing to producing its own AI‑optimized processors, aiming to become a central player in cloud and data‑center compute. The company unveiled its first in‑house AGI CPU, built on TSMC’s process,...
CIA’s Ghost Murmur Rescue | Intel X Terafab | AI’s Ghost Job Crunch
Intel quietly joined Elon Musk’s Terafab alliance, adding its foundry expertise to a U.S.-based terawatt compute push that will serve Tesla, SpaceX and xAI. Meanwhile, the CIA’s “Ghost Murmur” quantum magnetometer demonstrated the ability to track a weapons officer’s heartbeat...
No Fear to Fail: Secrets Behind Southchip's Rapid Growth
SouthChip, founded by Stefan Ron, positions itself as a "powerful bridge to future technology," concentrating on analog chips, embedded processors, and high‑efficiency power‑conversion solutions for smartphones, AI infrastructure, and automotive applications. The company operates as a design house of roughly...
CUDA Programming for NVIDIA H100s – Comprehensive Course
The video introduces a free, intensive 24‑hour curriculum that bridges basic coding to high‑performance CUDA programming on NVIDIA Hopper H100 GPUs. Aimed at engineers and senior technical leaders, the course promises hands‑on instruction in building efficient WGMMA pipelines, leveraging cutlass...
National Lab Discovery Series: LLNL's Massively Parallel Two-Photon Lithography Using Metaoptics
Lawrence Livermore National Laboratory unveiled a breakthrough in two‑photon lithography that replaces a single focal spot with a massive array of meta‑optics lenses. By coupling a high‑energy femtosecond laser to a spatial light modulator (SLM) and a wafer‑scale silicon metasurface...
Qualcomm's 6G Vision: AI, Sensing & the Road to 2029 | John Smee at MWC 2026
At Mobile World Congress 2026, Qualcomm outlined its 6G roadmap, emphasizing four pillars: ubiquitous connectivity, on‑device compute, artificial intelligence, and integrated sensing. The company argues that each new generation reflects broader societal needs, and 6G will move beyond faster data...
AVATAR: A Variable-Retention-Time Aware Refresh for DRAM Systems - DSN 2025 Test-of-Time Award
The DSN 2025 Test‑of‑Time award honored the seminal AVATAR paper, which tackled the growing DRAM refresh burden as capacities and operating frequencies increased. The authors highlighted that traditional uniform refresh intervals ignore the non‑uniform, variable‑retention‑time (VRT) behavior of memory cells,...
Intel Announces It Is Joining Musk's Terafab Project
Intel announced its participation in Elon Musk’s ambitious Terafab venture, a joint effort to build a fab capable of delivering a terawatt of AI compute power. The collaboration is framed as Intel bringing its manufacturing know‑how to a project that...
RAM Isn't Making Sense.
The clip stitches together a rapid‑fire roundup of tech headlines, from a steep decline in Chinese DDR5 RAM prices to a surprising price hike by Samsung, a privacy probe into LinkedIn’s browser‑extension scans, NASA’s Artemis 2 lunar flyby, and a court‑ordered...
RISC-V Technical Session | From RISC-V Cores to Neuromorphic Arrays
Dr. Amir Yusada, an assistant professor at the University of Twente, presented a technical session on leveraging RISC‑V cores to construct neuromorphic arrays. Drawing on his experience in digital hardware, startups, and research institutes, he highlighted a new open‑source tutorial...
MediaTek and the Evolving Custom ASIC Business, More Memory Pain, and More
At its recent Analyst Day, Taiwan‑based MediaTek unveiled a dramatically different narrative for its custom ASIC business, signaling a move beyond its traditional role as a low‑cost mobile SoC supplier. The company highlighted a deep IP portfolio that includes power‑management units,...
The Problem with Just LUTs on an FPGA: No Way to Keep State
The video explains why relying solely on lookup tables (LUTs) in an FPGA prevents a design from retaining any state. LUTs implement pure combinational logic: they map inputs directly to outputs, so as soon as inputs change, outputs update instantaneously,...
The Development of Metalorganic Chemical Vapor Deposition for Traveling on the Alloy Road
Professor Russell Dupri’s lecture traced the 59‑year evolution of metal‑organic chemical vapor deposition (MOCVD) from a hand‑built Rockwell reactor in the 1970s to today’s multi‑kilometer‑scale Extron systems. He framed this technical journey as a “traveling on the alloy road,” highlighting...
Groq, Etched, SambaNova, Taalas // The AI Hardware Show S2E4
The AI Hardware Show episode dives deep into the rapidly evolving LLM inference market, profiling a suite of startups that are redefining data‑center acceleration. Hosts Sally Ward Foxton and Ian Cutras outline why inference at scale is the next cash‑flow...
VLIW: The “Impossible” Computer
The video chronicles the rise of Very Long Instruction Word (VLIW) architectures, a radical approach that promises computers up to twenty‑plus times faster without exotic silicon. By shifting the burden of parallelism from hardware to a sophisticated compiler, VLIW packs...
Intel Nova Lake Threatens AMD! (Ultra 7 270K Plus = Proof)
Intel unveiled its Nova Lake family, branded Ultra 5 and Ultra 7, positioned as ultra‑low‑cost CPUs aimed at budget‑conscious professionals rather than gamers. Benchmarks show the chips trail AMD’s Ryzen 5/7 equivalents at similar price points, especially in gaming, while offering...