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Intel teases 44‑core Nova Lake desktop CPU with expanded core tiles
A leak reveals Intel's upcoming Nova Lake‑S line will ship a 44‑core SKU, replacing the previously rumored 42‑core model. The configuration combines two identical 8P+12E compute tiles, freeing a 6P+12E tile that could be sold as a lower‑priced, locked variant while still retaining on‑die big last‑level cache. Top‑end models may sport 288 MB of bLLC.
CEA‑Leti and Fraunhofer IPMS have successfully demonstrated a wafer‑exchange pilot line for hafnium‑zirconium‑oxide ferroelectric stacks, proving that complex material stacks can be processed across multiple advanced fabs without contamination. The program used 300 mm CMOS cleanrooms, standardized VPD‑ICP‑MS and TXRF checks, and PUND electrical testing to validate device behavior. Results showed titanium nitride bottom electrodes delivering superior reliability over tungsten after 10⁷ cycles. The initiative paves the way for a Europe‑wide material‑testing platform and upcoming integration with GlobalFoundries’ 22 nm memory demonstrator.
Broadcom $AVGO just said it has entered into a long term agreement with Google $GOOGL "for Broadcom to develop and supply custom Tensor Processing Units (“TPUs”) for Google’s future generations of TPUs and a Supply Assurance Agreement for Broadcom to...
TechInsights hosted a data‑driven seminar for AWS automotive teams, highlighting a decisive shift from distributed electronic modules to centralized compute architectures in vehicles. The briefing detailed how high‑performance automotive SoCs, expanding memory bandwidth, and silicon‑carbide power devices are reshaping AI...
The European Chips Skills Academy (ECSA) has launched the ECSA Learning Platform, a free digital hub offering more than 60 introductory to intermediate semiconductor courses. Developed with industry and academic partners, the platform integrates a Knowledge Hub, community collaboration spaces,...
The EU has launched the €50 million SPINS pilot line, one of six quantum pilot facilities created under the Chips Act. Coordinated by imec, SPINS unites 25 RTOs, industry players and universities to develop semiconductor‑based spin‑qubit chips. The initiative targets three...
University of Pittsburgh engineers have devised a laser‑induced graphene (LIG) manufacturing method that uses an iron‑oxide ink layer to precisely control graphene formation on polymer films. The technique enables tunable electrode thickness and conductivity, and can create graphene on either...
IVWorks announced a $4.5 million financing round, bringing its total capital raised to $33 million, to accelerate deployment of its proprietary reGaN technology. The company will use the funds to scale mass‑production infrastructure and secure its supply chain for GaN epitaxial wafers...
A bipartisan group of U.S. senators has introduced the MATCH Act, shifting export controls on advanced wafer‑fabrication equipment from fab‑level to company‑level restrictions. The bill would bar DUV lithography, etching and deposition tools from reaching Chinese firms such as Huawei,...
The semiconductor foundry market hit a record $320 billion in 2025, with TSMC commanding 38% and growing 36% YoY, far outpacing rivals that collectively rose 8%. Its dominance stems from an unprecedented volume of sub‑5 nm wafers, aggressive price hikes, and a...
Intel’s upcoming Nova Lake CPUs, part of the Core Ultra 400 series, will integrate Xe3 graphics and the Xe3P display/media engine rather than the newer Xe4 IP. The platform targets a late‑2026 launch with early‑2027 market availability and will natively support...
YieldWerx announced a forthcoming webinar that will teach semiconductor engineers how to implement co‑packaged photonics (CPO) across the full product lifecycle. The session, led by CEO/CTO Aftkhar Aslam, will detail the 12 cross‑domain challenges—from optical data complexity to test‑flow discontinuities—and...
CEA‑Leti, CEA‑List and Powerchip Semiconductor Manufacturing Corporation (PSMC) announced a partnership to embed CEA‑List’s RISC‑V processor IP and CEA‑Leti’s microLED silicon‑photonic chiplets into PSMC’s 3D‑stacking and interposer platform. The integration replaces traditional copper interconnects with short‑reach, high‑bandwidth optical links, delivering...
Pat’s Law of Something: All major vendors and suppliers are always in talks and testing. I do think this will move forward, though. Packaging is an easier commitment than wafers as it doesn’t force a redesign. Not easy but just...
Working on building a new cost per transistor model with updated economics since it's been a few years since I have seen one. So many more dynamics are needed than the ones from a few years ago, pre AI...
![[OFC 2026] Part 2 of 5: CPO and the AI Interconnect Challenge](/cdn-cgi/image/width=1200,quality=75,format=auto,fit=cover/https://substackcdn.com/image/fetch/$s_!FG3y!,w_256,c_limit,f_auto,q_auto:good,fl_progressive:steep/https%3A%2F%2Fsubstack-post-media.s3.amazonaws.com%2Fpublic%2Fimages%2F3201360a-f898-4593-8267-8cfc0766cc04_1280x1280.png)
AI training racks are scaling rapidly, with Meta's upcoming ORW rack doubling node count and pushing single‑rack power beyond one megawatt. Copper backplanes now face insurmountable limits in bandwidth, power density, and routing complexity. Meta used OFC 2026 to set...
Vishay Intertechnology has released the VODA1275, an automotive‑grade photovoltaic MOSFET driver built in a compact SMD‑4 package with an 8 mm creepage distance and a CTI‑600 mold compound. The driver offers 20 V open‑circuit voltage, 20 µA short‑circuit current, and an 80 µs turn‑on...
Intel quietly added the Core Ultra 7 251HX to its Arrow Lake HX family, slotting between the Core Ultra 5 245HX and the Core Ultra 7 255HX. The processor features 18 cores – six Performance and twelve Efficient – with a 30 MB Smart Cache and a...
RISC‑V has moved from a promising ISA to a viable platform as the RVA23 baseline unifies high‑performance compute. Arm’s recent transition to a silicon‑first model reshapes the IP landscape, intensifying competition. Akeana’s Alpine test chip, taped out in a 4 nm...
Over the past few years GaN HEMTs have moved beyond consumer chargers into high‑performance markets such as AI data‑center servers and humanoid robotics. EPC’s CEO Alex Lidow explained that the material’s low on‑resistance, ultra‑fast switching and high power density make it...
Indium Corporation has signed a long‑term offtake framework with Flash Metals USA, a Metallium subsidiary, to purchase critical metals recovered from electronic scrap using Flash Joule Heating technology. The agreement covers gallium, germanium, copper, tin, gold and indium, with an...
Japan’s state‑backed chipmaker Rapidus has moved its IIM‑1 plant in Hokkaido from construction to an operating pilot line, delivering working two‑nanometer gate‑all‑around prototypes. The company secured a ¥267.6 billion ($1.7 billion) financing round led by the government and over 30 private partners,...
A quiet but critical battle is unfolding in agentic AI infrastructure over the key‑value (KV) cache. The KV cache, which stores key and value projections for every token, scales linearly with context length, layer count, batch size, and heads, consuming...
Intel’s upcoming Nova Lake Core Ultra 400 desktop CPUs, now expected in 2027, are rumored to pack up to 52 cores, higher clock speeds and a notable IPC uplift that could outpace AMD’s Zen 6 chips. Leaker HXL suggests Nova Lake’s P‑core...
Intel confirmed that its 14th‑gen Core “Raptor Lake Refresh” desktop CPUs, the 700‑series chipset, and the LGA1700 socket will stay in production and be “abundantly available.” The company is encouraging motherboard makers to launch boards that support both DDR4 and...
Canadian retailers ShopRBC and PC‑Canada have posted early listings for AMD's Ryzen 9 9950X3D2 Dual Edition, pricing the chip at CAD $1,374‑$1,375, which converts to roughly USD $990. The listings suggest AMD will set a $999 MSRP when the processor launches on April 22, 2026. The...
Chinese manufacturer WCH’s CH32V006 RISC‑V microcontroller, launched in 2024, powers the new $2 WeAct CH32V006F8U6 Mini Core development board. The board features a 48 MHz 32‑bit RISC‑V2C core, 8 KB SRAM, 62 KB flash, USB‑C power, and selectable 3.3 V or 5 V I/O via...
Researchers at Loughborough University unveiled a nanoporous niobium‑oxide memristor that performs reservoir computing directly in hardware, achieving up to 2,000‑times lower energy consumption than conventional software solutions. The same chip accurately forecasted short‑term Lorenz‑63 chaos, recognized pixelated digits and executed...
NXP Semiconductors has launched the omlox Starter Kit, a turnkey solution that merges UWB hardware, software and analytics into a single platform built on the omlox open standard. The kit centers on NXP’s Trimension SR048 UWB SoC and MCX W72...
Intel abruptly discontinued its official XeSS plugin for the Unity game engine, removing support for frame generation, temporal super‑sampling, and antialiasing. This follows the release of Intel's XeSS 3.0 SDK only a month earlier, which introduced multi‑frame generation and shared...
People are using AI to break CUDA’s moat. Given any pytorch model, it profiles it, ranks bottlenecks by amdahl's law, writes triton or CUDA C++ replacements, and runs 300+ experiments overnight with no human in the loop. - 5.29x over pytorch eager...
I remember so many people thinking I was nuts to suggest that years ago that XPUs would be successful and that it would be a GPU-only world.
The semiconductor industry is riding a multi‑year AI‑driven expansion, with February 2026 sales growth, record 300 mm fab equipment spending, and a $360 billion Foundry 2.0 outlook. At the same time, upstream material shortages—particularly helium, naphtha, tungsten, and sulfur—are exposing new supply‑chain vulnerabilities....
#Technology #Newsletter #Semiconductor #Manufacturing #Product NLOG-298 | Semiconductor And Beyond Newsletter | The Semiconductor Product Types: https://newsletter.chetanpatil.in/p/semiconductor-and-beyond-newsletter-298/
Drew Baglino: "Medium voltage is the next frontier." "The latest SiC devices are more than a better switch. They are the foundation for solid-state transformers, or SSTs." #alwaysbecharging ⚡️⚡️⚡️ https://t.co/6ck5EnX9Sb
The Silicon Photonics Market and Technology Report 2026 highlights rapid growth in datacenter optical interconnects driven by AI workloads and the shift toward co‑packaged optics. It outlines a projected market size of roughly $12 billion by 2026, driven by expanding foundry...
Intel announced the Core Ultra X9 378H, a 16‑core Panther Lake processor that mirrors the X7 368H’s architecture but caps its turbo at 5 GHz, slightly below the X9 388H’s 5.1 GHz. It retains the Intel Arc B390 integrated GPU while stripping enterprise‑grade features such as vPro, AMT, and...
Intel’s upcoming Nova Lake‑S desktop processor line has a leaked 44‑core SKU, replacing the previously announced 42‑core model by using two identical 8P+12E compute tiles. The change frees up 6P+12E tiles, which could be sold as lower‑priced, locked non‑K variants...
The OFC 2026 conference showcased seven papers from Samsung, GlobalFoundries and NVIDIA that dissect the state of 300 mm silicon‑photonic (SiPh) foundries. While the headline race to 200 Gbit/s per wavelength still dominates headlines, the papers reveal that success now hinges on...
#Technology #Blog #Semiconductor #Manufacturing #System BLOG-321 | The Semiconductor Shift From Silicon To System: https://www.chetanpatil.in/the-semiconductor-shift-from-silicon-to-system/
Researchers at North Carolina State University and an international team have unveiled a new technique to generate orbital currents using chiral phonons. The method transfers angular momentum from circularly vibrating atoms directly to electrons in non‑magnetic, inexpensive materials. Published in...
NVIDIA unveiled Neural Texture Compression (NTC), an AI‑driven method that slashes GPU VRAM usage by up to seven times. In a GTC 2026 demo, the technology compressed a 6.5 GB texture set to just 970 MB while preserving visual fidelity. NTC replaces traditional...
Nvidia showcased Neural Texture Compression (NTC), an AI‑driven method that compresses game textures dramatically. In a demo, a scene that required 6.5 GB of VRAM with traditional block compression ran on just 970 MB using NTC, with no visible loss in image...
The Linux 7.1 kernel will include a patch that exposes AMD Zen 6’s new AVX‑512 Bit Matrix Multiply (BMM) instructions to KVM virtual machines. Zen 6’s ISA adds BMM and bit‑reversal operations, confirmed by recent Binutils, GCC and LLVM updates. The KVM patch...
Samsung Electronics held its 2026 Device Solutions Division Mutual Growth Cooperation Day, honoring 17 top suppliers for achievements in technology, cost efficiency and ESG performance. KCTech received the highest technology innovation award for advancing localized CMP equipment, while Wonik IPS...
The U.S. Congress introduced the MATCH Act to tighten export controls on critical semiconductor manufacturing equipment, targeting entity‑based loopholes and allied asymmetry. Meanwhile, the Blue‑X consortium announced a shift to 3.1nm wavelength lithography, aiming to demonstrate a micro‑exposure tool within...
SEMI announced Mary Bischoping as its new Senior Director of Public Policy and Advocacy, based in Washington, D.C. Bischoping will steer SEMI’s engagement with U.S. lawmakers on supply‑chain resilience, intellectual‑property protection, tax policy, and emerging technologies such as AI and...
Cohu announced two customers placed follow‑on orders worth $30 million for its Eclipse platform with active thermal control to test next‑generation high‑performance computing processors. The orders, to be delivered over the next few quarters, deepen Cohu’s footprint in the rapidly expanding...
ACM Research announced a rebranding of its product line into the ACM Planetary Family, a process‑based portfolio organized around eight distinct series. Each series corresponds to a core step in semiconductor wafer and panel manufacturing, from cleaning to advanced packaging...
CEA‑Leti, CEA‑List and Powerchip Semiconductor Manufacturing Corporation (PSMC) announced a strategic partnership to fuse CEA‑List’s RISC‑V design expertise with CEA‑Leti’s silicon‑photonic microLED technology into PSMC’s 3D‑stacking and interposer platforms. The joint effort will embed short‑reach, high‑bandwidth optical links and customizable...
Infineon Technologies has unveiled the TDM24745T, a quad‑phase power module built on its TLVR (trans‑inductor voltage regulator) architecture for AI‑focused data centers. The 9 × 10 × 5 mm³ device packs four power stages, a TLVR inductor and decoupling capacitors, achieving a current density above...
