Know What's Happening in Semiconductors
Know What's Happening in Semiconductors
Semiconductors Pulse
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Intel teases 44‑core Nova Lake desktop CPU with expanded core tiles
A leak reveals Intel's upcoming Nova Lake‑S line will ship a 44‑core SKU, replacing the previously rumored 42‑core model. The configuration combines two identical 8P+12E compute tiles, freeing a 6P+12E tile that could be sold as a lower‑priced, locked variant while still retaining on‑die big last‑level cache. Top‑end models may sport 288 MB of bLLC.
The article revisits the classic memory‑hog cycle—where surging demand fuels price spikes, capacity expands, and oversupply triggers crashes—through the lens of today’s AI boom. It highlights that AI accelerators now consume roughly 70% of high‑end DRAM, pushing memory prices up nearly double in a single quarter and inflating memory’s share of PC/phone bills to 25‑30%. At the same time, IDC forecasts an 11% drop in global PC shipments in 2026, a traditional warning sign for memory investors. The piece argues that AI‑driven infrastructure could provide a structural floor that softens the usual bust, but risks remain if that demand falters.
Semiconductor Intelligence projects total industry capital spending to reach $200 billion in 2026, a 20% rise from 2025 and outpacing market growth. TSMC remains the largest spender, targeting $52‑$56 billion, while most other foundries stay flat except GlobalFoundries’ 70% increase. Elon Musk’s...
Silvaco Group announced an expanded strategic partnership with Taiwan's Advanced Power Electronics Corp (APEC) to deepen the use of its Victory Device, Gateway, and SmartSpice simulation tools. The collaboration gives APEC broader access to Silvaco's TCAD and EDA solutions, aiming...
Semiconductor test equipment maker Aehr Test Systems announced an initial order from a major, unnamed networking supplier developing silicon‑photonic transceivers for hyperscale AI and cloud data centers. The order includes several FOX‑XP wafer‑level burn‑in systems capable of testing nine wafers...
Side‑channel leakage often surfaces only after first silicon, forcing expensive redesigns. The Inspector Pre‑Silicon framework embeds side‑channel analysis into RTL and gate‑level verification, generating test vectors and statistical metrics to identify leakage early. By providing actionable, module‑level insights throughout the...
The article reviews the historical scaling limits of DDR DRAM and highlights that DDR5 now supports only one DIMM per channel, a trend that may continue with DDR6. Industry insiders speculate that DDR7 could eliminate DIMMs entirely, dramatically reducing bus...
Telink introduced the TL3228, the first chip in its TL322x wireless MCU family, featuring a 192 MHz dual‑core RISC‑V processor and support for Bluetooth 6.0, Matter, Thread, Zigbee, RF4CE, and a proprietary 2.4 GHz radio. The MCU offers up to 6 Mbps data rates,...
Per the $NVDA + $MRVL investment... I do wonder if this also opens the door to $NVDA selling CPU racks to custom XPUs made by $MRVL for hyperscale customers. Obvsiously, it does help them lock up more parts of the...
Nvidia is investing another $2 billion in Marvell, extending a series of multi‑billion‑dollar bets aimed at shaping the AI datacenter supply chain. The partnership will have Marvell produce custom XPUs and NVLink Fusion‑compatible networking, leveraging its recent acquisition of XConn’s high‑bandwidth PCIe...
Metallium Ltd's US arm, Flash Metals USA, has signed a long‑term off‑take agreement with Indium Corp to purchase recovered gallium, germanium, copper, tin, gold and indium from Metallium's recycling operations. The contract runs for an initial ten years with automatic...
University of Florida researchers released a technical paper introducing a causal‑inference framework for analog‑mixed‑signal (AMS) circuit design. The method builds a directed‑acyclic graph from SPICE simulation data and estimates average treatment effects (ATE) to rank design parameters. Tested on three...
Semiconductor Today’s March 2026 issue spotlights rapid advances in compound semiconductors, noting a projected market size of roughly $5.2 bn by 2031 growing at a 14% CAGR. The publication highlights the ALP‑4‑SiC project for quantum photonic circuits, new growth methods for...
Will do a memory market update next week. But in the meantime. Nothing has changed since this report a month ago. Memory still on track to ~$200B https://t.co/QSHAd1OxK2
Fujitsu announced plans to develop a dedicated AI inference NPU using Rapidus' 1.4 nm process, with an estimated development cost of ¥58 billion (about $363 million). The project, funded roughly two‑thirds by the New Energy and Industrial Technology Development Organization, will be designed...
RISC‑V Now! is a Silicon Valley conference designed to turn the open RISC‑V instruction set architecture into shipped products at scale. The event attracted roughly 600 semiconductor professionals from more than 250 companies, including industry giants such as Apple, Google,...
Kioxia announced it will cease production of all 2D (planar) NAND flash and its third‑generation BiCS 3D NAND, with final shipments scheduled for December 31 2028. The phase‑out covers legacy 32nm, 24nm and 15nm planar nodes as well as early 64‑layer BiCS3...
Toradex introduced two ultra‑compact 30 × 30 mm System‑on‑Module families, OSM and Lino, built around NXP i.MX 91 and i.MX 93 processors for edge industrial and IoT use cases. OSM follows the OSM Size‑S standard with a 332‑ball LGA that is soldered directly to a...
Researchers at UC Davis have demonstrated that halide perovskite crystals undergo rapid, reversible lattice distortions when illuminated, a phenomenon termed photostriction. Using laser excitation and X‑ray probing, they showed the effect can be tuned by adjusting the crystal composition, light wavelength,...
Apple’s latest M5 Pro and M5 Max chips are closing the performance gap with dedicated gaming PCs. Benchmarks by YouTuber Andrew Tsai show the M5 Pro delivering roughly 60 fps in upscaled 1440p on titles like Cyberpunk 2077, while the 40‑core M5 Max sustains similar frame rates...
Applied Optoelectronics Inc. (AOI) secured a volume order exceeding $53 million from a major hyperscale customer for 800‑gigabit single‑mode data‑center transceivers. The order supports AI‑driven GPU clusters and will be shipped between Q2 and mid‑Q3 2026 after product qualification. AOI’s CEO highlighted...
Intel unveiled the Optimization Zone, a GitHub‑hosted repository that consolidates performance tuning guides and best‑practice recipes for Intel data‑center hardware. The hub currently includes optimization recipes for workloads such as Apache Kafka, Cassandra, Redis, and Spark, and provides BIOS tunables,...
LILYGO has launched the T‑Display‑P4, a smartphone‑sized development kit that pairs the new ESP32‑P4 RISC‑V MCU with an ESP32‑C6 Wi‑Fi 6/BT 5.x module and optional SX1262 or LR2021 LoRa transceiver. The board offers a 4‑inch TFT or AMOLED screen, 2 MP camera, 32 MB...
Researchers at the University of Science and Technology of China have created a single semiconductor diode that simultaneously senses light, stores data and performs processing. By inserting an aluminum‑gallium‑nitride layer into a GaN p‑n junction, the device can switch among...
NIST researchers have introduced hydroxide catalysis bonding (HCB) as a new packaging method for photonic integrated circuits, replacing traditional polymer adhesives with a glass‑like inorganic bond. The HCB‑packaged chips survived cryogenic temperatures, intense ionizing radiation, high‑vacuum conditions, and rapid thermal...
Researchers at National Taiwan University introduced a unified analytical framework that captures how channel thickness, trap states, interface quality, and surface roughness jointly dictate the performance of atom‑thin indium‑oxide and tungsten‑doped indium‑oxide transistors. The model accurately reproduces I‑V characteristics for...
